• DocumentCode
    983491
  • Title

    Program implementation schemes for hardware-software systems

  • Author

    Gupta, Rajesh K. ; Claudionor, N.C. ; Micheli, Giovanni De

  • Author_Institution
    Illinois Univ., Urbana, IL, USA
  • Volume
    27
  • Issue
    1
  • fYear
    1994
  • Firstpage
    48
  • Lastpage
    55
  • Abstract
    Recent advances in the design and synthesis of integrated circuits have prompted system architects to investigate computer aided design methods for systems that contain both application-specific and predesigned reprogrammable components. For the most part, we can apply high level synthesis techniques to synthesis of systems containing processors by treating the latter as a generalized resource. However, the problem is more complex, since the software on the processor implements system functionality in an instruction-driven manner with a statically allocated memory space, whereas ASICs operate as data driven reactive elements. Due to these differences in computational models and primitive operations in hardware and software, a new formulation of the problem of cosynthesis is needed. The authors present their cosynthesis approach. They specify system behavior using HardwareC, a hardware description language (HDL) that has a C-like syntax and supports timing and resource constraints. It also supports specification of unbounded and unknown delay operations that can arise from data-dependent decisions and external synchronization operations. The particular choice of a HDL to specify system functionality is immaterial for the cosynthesis formulation here, and other HDLs such as Verilog could be used.<>
  • Keywords
    CAD; software tools; specification languages; HardwareC; application-specific; computer aided design methods; cosynthesis; data-dependent decisions; external synchronization; hardware description language; hardware-software systems; predesigned reprogrammable components; system behavior; Application specific integrated circuits; Clocks; Computational modeling; Delay; Dynamic scheduling; Hardware design languages; Integrated circuit synthesis; Microprocessors; Software systems; Timing;
  • fLanguage
    English
  • Journal_Title
    Computer
  • Publisher
    ieee
  • ISSN
    0018-9162
  • Type

    jour

  • DOI
    10.1109/2.248880
  • Filename
    248880