DocumentCode :
985378
Title :
Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSIs
Author :
Sakurai, Takayasu
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Volume :
40
Issue :
1
fYear :
1993
fDate :
1/1/1993 12:00:00 AM
Firstpage :
118
Lastpage :
124
Abstract :
A closed-form formula for a waveform of the RC interconnection line with practical boundary conditions is derived. Expressions are also derived for the voltage slope and transition time of the RC interconnection and for coupling capacitance and crosstalk voltage height, which can be used in VLSI designs. Using the expressions, the optimum linewidth that minimizes RC delay and the trend of RC delay in the scaled-down VLSIs are discussed
Keywords :
VLSI; capacitance; crosstalk; delays; semiconductor device models; RC delay; RC interconnection line; VLSI designs; boundary conditions; closed-form formula; coupling capacitance; crosstalk; interconnection delay; optimum linewidth; scaled-down VLSIs; transition time; voltage slope; Aluminum; Boundary conditions; Capacitance; Capacitors; Closed-form solution; Crosstalk; Delay effects; Integrated circuit interconnections; Very large scale integration; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.249433
Filename :
249433
Link To Document :
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