Title :
New method for threshold voltage extraction of high-voltage MOSFETs based on gate-to-drain capacitance measurement
Author :
Anghel, Costin ; Bakeroot, Benoit ; Chauhan, Yogesh S. ; Gillon, Renaud ; Maier, Christian ; Moens, Peter ; Doutreloigne, Jan ; Ionescu, Adrian Mihaim
Author_Institution :
Swiss Fed. Inst. of Technol., Lausanne, Switzerland
fDate :
7/1/2006 12:00:00 AM
Abstract :
This letter reports on the extraction of the threshold voltage of laterally diffused MOS transistors. A clear analysis of the device physics is performed, highlighting the correlation between the change of the electron charge distribution along the channel and the device capacitance variations when the gate voltage is swept. Using numerical simulations, it is shown that the peak of the gate-to-drain capacitance is related to the transition of the surface from weak to moderate inversion in the intrinsic MOS transistor at the location of the maximum doping concentration, which corresponds to the threshold voltage of the device according to the MOS theory. Comparison between conventional ID/√gm extraction and the new proposed capacitance peak method is performed on both technology computer-aided design simulations and measurements in order to confirm the new experimental technique and related theory.
Keywords :
MOSFET; capacitance measurement; semiconductor device measurement; MOS transistors; diffused MOSFET; electron charge distribution; gate-to-drain capacitance measurement; high-voltage MOSFET; threshold voltage extraction; Capacitance measurement; Design automation; Doping; Electrons; MOSFETs; Numerical simulation; Performance analysis; Performance evaluation; Physics; Threshold voltage; Capacitances; high-voltage (HV) diffused MOSFETs (DMOSFETs); threshold voltage;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2006.877275