Title :
A 15-bit 30-MS/s 145-mW three-step ADC for imaging applications
Author :
Van der Ploeg, Hendrik ; Vertregt, Maarten ; Lammers, Marco
Author_Institution :
Philips Res. Labs., Eindhoven
fDate :
7/1/2006 12:00:00 AM
Abstract :
This paper describes the design and realization of a 15-bit 30-MS/s three-step ADC for imaging applications with a peak-to-peak signal to rms noise ratio (DRpp) of 85 dB. The offsets of the residue amplifiers are independently background calibrated. The ADC is realized in single-poly, 0.18-mum CMOS, measures 1.4 mm2, and dissipates 145 mW from 1.8-V and 3.3-V supplies
Keywords :
CMOS integrated circuits; analogue-digital conversion; integrated circuit design; low-power electronics; 0.18 micron; 1.8 V; 145 mW; 15 bit; 3.3 V; CMOS process; analog-digital conversion; residue amplifiers; three-step ADC; CMOS image sensors; Charge coupled devices; Charge-coupled image sensors; Dynamic range; Energy consumption; Image coding; Image converters; Integrated circuit noise; Quantization; Signal to noise ratio; Analog–digital conversion; analog–digital converter (ADC); calibration; imaging; mixed analog–digital integrated circuits; mixed signal;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2006.873890
