Dual high-κ gate dielectric with poly gate electrode: HfSiON on nMOS and Al2O3 capping layer on pMOS

In this letter, a novel dual high-κ approach, different high-κ dielectrics in nMOS and pMOS, with poly Si gate electrode is introduced. By turning the Fermi-pinning effect into an advantage, this dual high-κ approach achieved a lower V_tp and a symmetrical V_tn/V_tp over a wide range of channel lengths for potential high-κ/poly Si CMOS application. In addition to the V_t control, this approach also can improve the drive current ratio between nMOS and pMOS, which would further scale the CMOS area by reducing the pMOS width.