Title :
A VLSI for deskewing and fault tolerance in LVDS links
Author :
Torralba, Gloria ; Angelov, Venelin ; González, Vicente ; Lindenstruth, Volker ; Sanchis, Enrique
Author_Institution :
Electron. Eng. Dept., Heidelberg Univ., Germany
fDate :
6/1/2006 12:00:00 AM
Abstract :
The need for high input/output (I/O) bandwidth has led to the use of point-to-point parallel links. At the same time, the low-voltage differential signaling (LVDS) technology has become very popular as a standard mostly due to its high performance and reliability in conjunction with low price. However, one limitation of the LVDS transmission is the strong dependence of the performance on the transmission distance since the media is a copper cable and data are transmitted at high frequency. The skew of the transmitted data is extremely important because it directly affects the sample window available to the receiver logic. It either forces to use high quality cables in order to minimize its effects or to reduce the maximum transmission distance. The device presented in this paper is a mixed digital/analog design implemented in a 0.35 μm CMOS process for compensating the skew which affects parallel data transmissions and for providing fault tolerance in large scale systems, for instance used in trigger farms for high-energy physics experiments. The SWItch for Fault Tolerance chip (SWIFT) compensates dynamically skews of LVDS signals up to 250 MHz in steps of 100 ps and adds fault tolerance to a farm of PCs by allowing the bypassing of a failing compute node to which is attached.
Keywords :
CMOS integrated circuits; VLSI; fault tolerance; mixed analogue-digital integrated circuits; telecommunication links; telecommunication signalling; CMOS process; LVDS Links; LVDS transmission; SWItch for Fault Tolerance chip; VLSI; analog design implementation; copper cable; delay units; deskewing tolerance; granularity; high-energy physics experiments; input bandwidth; large scale systems; low-voltage differential signaling technology; mixed digital design implementation; output bandwidth; parallel data transmissions; point-to-point parallel links; receiver; skew compensation; trigger farms; Bandwidth; CMOS logic circuits; CMOS process; Communication cables; Copper; Fault tolerance; Frequency; Logic devices; Switches; Very large scale integration; Delay units; fault tolerance; granularity; low-voltage differential signaling (LVDS); parallel links; skew compensation;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2006.874799