DocumentCode :
986858
Title :
Two-level logic circuits using EXOR sums of products
Author :
Saul, J. ; Eschermann, B. ; Froessl, J.
Author_Institution :
Dept. of Electr. & Electron. Eng., Bristol Univ., UK
Volume :
140
Issue :
6
fYear :
1993
fDate :
11/1/1993 12:00:00 AM
Firstpage :
348
Lastpage :
356
Abstract :
Two-level logic is most often implemented as an inclusive-OR sum of product terms, e.g. with PLAs. Using exclusive-OR (EXOR) sums may simplify the representation and manipulation of Boolean functions and result in more easily testable implementations requiring fewer product terms. However, due to the lack of relevant algorithms and efficient implementation structures, it has not been possible to translate these theoretical advantages into practical benefits. Solutions for the two main problems associated with the use of EXOR sums are presented. On the one hand the authors describe a new method to minimise functions using two-level EXOR sums of products, on the other hand they present an implementation structure called the XPLA to map the minimisation results to efficient circuit layouts. They show, for a set of benchmark examples, that the minimisation algorithm results in representations with considerably smaller product term counts than previous EXOR minimisation algorithms or sum-of-product minimisation algorithms. They also show, although the EXOR operator is more expensive to implement in today´s technologies, that XPLA implementations can be considerably more compact than PLAs in some cases, and give increased testability.
Keywords :
Boolean functions; logic arrays; logic circuits; logic testing; minimisation; Boolean functions; EXOR sums of products; PLAs; XPLA; minimisation; testability; two-level logic circuits;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
Publisher :
iet
ISSN :
0143-7062
Type :
jour
Filename :
249694
Link To Document :
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