Dominant Layer for Stress-Induced Positive Charges in Hf-Based Gate Stacks

Author

Zhang, Jian F. ; Chang, Mo Huai ; Ji, Zhigang ; Lin, Lin ; Ferain, Isabelle ; Groeseneken, Guido ; Pantisano, Luigi ; De Gendt, Stefan ; Heyns, Marc M.

Author_Institution

Sch. of Eng., Liverpool John Moores Univ., Liverpool

Volume

29

Issue

12

fYear

2008

Firstpage

1360

Lastpage

1363

Abstract

Positive charges in Hf-based gate stacks play an important role in the negative bias temperature instability of pMOSFETs, and their suppression is a pressing issue. The location of positive charges is not clear, and central to this letter is determining which layer of the stack dominates positive charging. The results clearly show that positive charges are dominated by the interfacial layer (IL) and that they do not pile up at the HfSiON/IL interface. The results support the assumption that positive charges are located close to the IL/substrate interface. Unlike electron trapping that reduces rapidly for thinner Hf dielectric layer, positive charges cannot be reduced by using a thinner HfSiON film.

Keywords

MOSFET; dielectric materials; hafnium compounds; stability; Hf-based gate stacks; HfSiON; IL/substrate interface; dielectric layer; dominant layer; interfacial layer; negative bias temperature instability; pMOSFET; stress-induced positive charges; Dielectric substrates; Electron traps; Hafnium; Interface states; MOSFETs; Negative bias temperature instability; Niobium compounds; Pressing; Pulse measurements; Titanium compounds; Hf silicates; high-$k$ gate dielectric; instability; negative bias temperature instability (NBTI); positive charges; reliability; spatial distribution;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2008.2006288

Filename

4671147