• DocumentCode
    991850
  • Title

    Fault location for nonlinear resistive circuits

  • Author

    Rutkowski, J. ; Macura, A.

  • Author_Institution
    Silesian Technical University, Institute of Electronics, Gliwice, Poland
  • Volume
    20
  • Issue
    10
  • fYear
    1984
  • Firstpage
    401
  • Lastpage
    403
  • Abstract
    The letter deals with fault location in nonlinear resistive circuits taking the design tolerances of the nonfaulty circuit parameters into consideration. The method described is based on measurements of node voltages at a single test. It belongs to the class of topological methods, and two-terminal as well as m-terminal elements are permitted.
  • Keywords
    fault location; network topology; nonlinear network analysis; design tolerances; fault location; m-terminal elements; node voltages; nonlinear resistive circuits; topological methods; two terminal elements;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19840278
  • Filename
    4248726
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=991850