Title :
A fast shaping low power amplifier-comparator integrated circuit for silicon strip detectors
Author :
Spencer, E. ; Dorfan, D. ; Grillo, A. ; Kashigin, S. ; Rowe, W. ; Webster, A. ; Wilder, M.
Author_Institution :
SCIPP, California Univ., Santa Cruz, CA, USA
fDate :
8/1/1995 12:00:00 AM
Abstract :
We have designed and tested a 64 channel amplifier-comparator integrated circuit on the Maxim SHPi bipolar process. The low power design, 840 μW/channel, is intended for use as a frontend with high clock rate silicon strip detector systems. Peaking time at the comparator input is 20 ns, for good double pulse resolution, and noise is near optimum for the technology used. We have used the chip successfully in a proton beam test at KEK in Japan with a 40 MHz data clock
Keywords :
bipolar analogue integrated circuits; comparators (circuits); detector circuits; nuclear electronics; position sensitive particle detectors; pulse shaping circuits; silicon radiation detectors; 40 MHz; 64 channel amplifier-comparator integrated circuit; KEK proton beam test; Maxim SHPi bipolar process; Si; data clock; double pulse resolution; fast shaping amplifier-comparator integrated circuit; frontend; low power design; optimum noise; peaking time; strip detectors; Bipolar integrated circuits; Circuit testing; Clocks; Detectors; Integrated circuit noise; Integrated circuit testing; Particle beams; Pulse amplifiers; Silicon; Strips;
Journal_Title :
Nuclear Science, IEEE Transactions on
