Title :
High-performance fully depleted silicon-on-insulator transistors
Author :
MacElwee, Thomas W. ; Calder, Iain D. ; Bruce, Robert A. ; Shepherd, Frank R.
Author_Institution :
Northern Telecom Electron., Ottawa, Ont., Canada
fDate :
6/1/1990 12:00:00 AM
Abstract :
Thin single-crystal silicon-on-insulator films with defect densities as low as 8×105 dislocations/cm2 were formed by implantation of 1.5×1018 O+/cm2 at 150 kV into bare silicon and annealing at 1350°C for 6 h in nitrogen. Thin-film submicrometer MOS transistors were fabricated with self-aligned TiSi2 fully covering sources, drains, and gates, and with p+ and n+ polysilicon gates for PMOS and NMOS transistors, respectively, but without a lightly doped drain. Transistors with gate lengths as short as 0.4 μm exhibited essentially long-channel behavior with no kink and with a high saturation current. The device physics was investigated using PISCES simulations, which agreed well with the experimental results. A ring-oscillator stage delay of 58 ps was obtained for 1.0-μm gate length CMOS circuits operating at 5 V
Keywords :
CMOS integrated circuits; insulated gate field effect transistors; integrated circuit technology; metallisation; semiconductor technology; semiconductor-insulator boundaries; titanium compounds; 0.4 to 1 micron; 1350 C; 150 eV; 5 V; 58 ps; 6 h; CMOS circuits; N2 atmosphere; NMOS transistors; O+ ion implantation; PISCES simulations; SIMOX; SOI transistors; Si-SiO2; TiSi2-Si; annealing; defect densities; device physics; experimental results; gate lengths; kinkfree transistors; long-channel behavior; polysilicon gates; ring-oscillator stage delay; salicide; saturation current; self-aligned TiSi2; silicides; submicrometer MOS transistors; submicron channel length; Annealing; CMOS technology; Circuits; Fabrication; MOSFETs; Semiconductor films; Silicon on insulator technology; Space technology; Substrates; Thin film transistors;
Journal_Title :
Electron Devices, IEEE Transactions on
