DocumentCode :
996454
Title :
Differential Analog Layout for Improved ASET Tolerance
Author :
Kelly, Andrew T. ; Fleming, Patrick R. ; Holman, W. Timothy ; Witulski, Arthur F. ; Bhuva, Bharat L. ; Massengill, Lloyd W.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Vanderbilt Univ., Nashville, TN
Volume :
54
Issue :
6
fYear :
2007
Firstpage :
2053
Lastpage :
2059
Abstract :
Single-event transients (SETs) affecting a single side of a differential data path have been shown to cause signal degradation and data loss. A radiation hardened by design (RHBD) transistor layout technique is demonstrated that promotes charge collection on both sides of the differential data path. The induced common-mode error voltage is suppressed by the differential circuit, significantly reducing the SET amplitude.
Keywords :
analogue circuits; differentiating circuits; integrated circuit layout; monolithic integrated circuits; radiation hardening (electronics); transistor circuits; differential analog layout; differential circuits; induced common-mode error voltage; radiation hardening; single-event transients; transistor layout; Analog circuits; Capacitance; Degradation; Differential amplifiers; Fabrication; Helium; Radiation hardening; Space technology; Transistors; Voltage; Differential circuits; layout mitigation technique; radiation hardening by design (RHBD); single-event transient (SET);
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2007.910124
Filename :
4395046
Link To Document :
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