DocumentCode :
997872
Title :
A new approach for the verification of cache coherence protocols
Author :
Pong, Fong ; Dubois, Michel
Author_Institution :
Sun Microsyst. Comput. Co., Mountain View, CA, USA
Volume :
6
Issue :
8
fYear :
1995
fDate :
8/1/1995 12:00:00 AM
Firstpage :
773
Lastpage :
787
Abstract :
We introduce a cache protocol verification technique based on a symbolic state expansion procedure. A global Finite State Machine (FSM) model characterizing the protocol behavior is built and protocol verification becomes equivalent to finding whether or not the global FSM may enter erroneous states. In order to reduce the complexity of the state expansion process, all the caches in the same state are grouped into an equivalence class and the number of caches in the class is symbolically represented by a repetition constructor. This symbolic representation is partly justified by the symmetry and homogeneity of cache-based systems. However, the key idea behind the representation is to exploit a unique property of cache coherence protocols: the fact that protocol correctness is not dependent on the exact number of cached copies. Rather, symbolic states only need to keep track of whether the caches have 0, 1, or multiple copies. The resulting symbolic state expansion process only takes a few steps and verifies the protocol for any system size. Therefore, it is more efficient and reliable than current approaches. The verification procedure is first applied to the verification of five existing protocols under the assumption of atomic protocol transitions. A simple snooping protocol on a split-transaction shared bus is also verified to illustrate the extension of our approach to protocols with nonatomic transitions
Keywords :
cache storage; finite state machines; formal verification; memory protocols; shared memory systems; atomic protocol transitions; cache coherence protocol verification; cache-based systems; erroneous states; formal verification; global finite state machine model; nonatomic transitions; protocol behavior; repetition constructor; shared-memory multiprocessor; snooping protocol; split-transaction shared bus; symbolic representation; symbolic state expansion procedure; symbolic state expansion process; Access protocols; Automata; Coherence; Computer Society; Delay; Electronic mail; Formal verification; Reachability analysis; Sun; Testing;
fLanguage :
English
Journal_Title :
Parallel and Distributed Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1045-9219
Type :
jour
DOI :
10.1109/71.406955
Filename :
406955
Link To Document :
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