DocumentCode
999397
Title
New ECL gate in BiFET process
Author
Oklobzija, V.G.
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
Volume
29
Issue
23
fYear
1993
Firstpage
2029
Lastpage
2030
Abstract
An ECL gate is implemented as a combination of bipolar and MOS circuits in a BiFET process is presented. The resulting ECL gate exhibits an improved speed-power product over circuits presented in the past. Owing to its reduced power consumption this gate allows a higher level of integration for ECL. The process used is standard BiCMOS.
Keywords
BiCMOS integrated circuits; emitter-coupled logic; integrated logic circuits; logic gates; 2 mW; BiCMOS; BiFET process; ECL gate; ECL integration level; power consumption; speed-power product;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19931354
Filename
253962
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