بر اساس عنوان

1
An extractor for 3-D parasitic capacitance and resistance
2
An extra-low-frequency RS-SCALDO technique: A new approach to design voltage regulator modules
3
An Extraordinary New Class of Electro-Optic Materials: Binary Chromophore Glasses
4
An extrapolated matched-filter approach to multi-user channel estimation for OFDM in SDMA
5
An extrapolated sequential minimal optimization algorithm for support vector machines
6
An Extrapolated Yield Approximation Technique for Use in Yield Maximization
7
An Extrapolation Algorithm for (a,b,c,d) -Bandlimited Signals
8
An extrapolation for general analytic signals
9
An Extrapolation Method for Image Reconstruction from a Straight-line Trajectory
10
An Extrapolation Method for Improving Waveguide Probe Material Characterization Accuracy
11
An extrapolation method for MDCT domain frame loss concealment
12
An extrapolation procedure for band-limited signals
13
An extrapolation procedure to shorten time domain simulations
14
An extrapolation technique for antenna and RCS analysis involving large bodies
15
An extrapolation technique for predicting the radiation pattern of antennas and arrays located on large structures
16
An extrapolation technique for solving a class of large-body scattering problems by using the FDTD
17
An extrapolative-interpolative prediction coding method for HDTV signals
18
An Extra-Systole Arrhythmia Lowers the Scaling Exponent: DFA as a Beneficial Biomedical Tool
19
An extra-trees-based automatic target recognition algorithm
20
An extremal fields approach for the analysis of human planning and control performance
21
An Extremal Inequality and the Capacity Region of the Degraded Compound Gaussian MIMO Broadcast Channel With Multiple Users
22
An extremal inequality and the capacity region of the degraded MIMO compound Gaussian broadcast channel with multiple users
23
An extremal inequality for long Markov chains
24
An Extremal Inequality Motivated by Multiterminal Information Theoretic Problems
25
An Extremal Inequality Motivated by Multiterminal Information-Theoretic Problems
26
An Extreme Algorithm for Network-Topology Construction Based on Constrained Delaunay Triangulation
27
An Extreme Firm-Specific News Sentiment Asymmetry Based Trading Strategy
28
An Extreme Form of Superactivation for Quantum Zero-Error Capacities
29
An Extreme Function Theory for Novelty Detection
30
An Extreme Learning Machine (ELM) Predictor for Electric Arc Furnaces´ v-i Characteristics
31
An extreme learning machine approach for training Time Variant Neural Networks
32
An Extreme Learning Machine based on Quantum Particle Swarm Optimization and its application in handwritten numeral recognition
33
An Extreme Learning Machine-based pedestrian detection method
34
An extreme low bit rate speech coding algorithm around 300bps
35
An Extreme Low Power Galois Field Inversion Circuit
36
An extreme point result for robust stability of a diamond of polynomials
37
An extreme point result for robust stability of discrete-time interval polynomials
38
An extreme point result for robust stability of discrete-time systems with complex coefficients in two diamonds
39
An extreme point result of robust stability of a diamond of polynomials
40
An extreme power engineer- the accomplishments of Fred Stark Pearson. I
41
An Extreme Processor for an Extreme Experiment
42
An Extreme Simple Method for Digital FIR Filter Design
43
An Extreme Surface Proximity Push for Embedded SiGe in pMOSFETs Featuring Self-Aligned Silicon Reflow
44
An extreme ultraviolet radiation source based on a gas discharge plasma
45
An extreme value based neural clustering approach for identifying traffic states
46
An extreme value injection approach with reduced learning time to make MLNs multiple-weight-fault tolerant
47
An extreme value problem in a linear sampled-data feedback system
48
An extremely abrupt switching phenomenon in small-dimension polysilicon TFT structures with enhanced grain size
49
An Extremely Broadband Planar Active Receiving Antenna
50
An Extremely Broadband Software Configurable Six-Port Receiver Platform
51
An extremely broadband software configuration six-port receiver platform
52
An extremely broad-band waveguide polarizer
53
An extremely compact dielectric resonator antenna for space-limited UWB wireless communication devices
54
An extremely compact electro-absorption modulator integrated DFB laser module for 100Gbps Ethernet over 75km SMF reach
55
An extremely compact JPEG encoder for adaptive embedded systems
56
An extremely compact pattern diversity antenna for WLAN
57
An Extremely Compact UWB Microstrip Annular Ring Filter for Bluetooth Applications
58
An Extremely Compact, Lossless MMIC Comb Iner/Divider using Combination of Line-Unified-FET and Three-D Dimensional MMIC Structures
59
An extremely efficient supersonic chemical oxygen-iodine laser
60
An extremely fast economic load dispatch algorithm through modified coordination equations
61
An extremely fast technique for nonlinear three dimensional finite element magnetic field computations
62
An extremely fast Ziv-Lempel data compression algorithm
63
An extremely fine line
64
An Extremely Large Mode Area Microstructured Core Leakage Channel Fiber With Low Bending Loss
65
An Extremely Large Vocabulary Approach to Named Entity Extraction from Speech
66
An extremely lightweight electronically steerable microstrip phased array antenna
67
An extremely lightweight fuselage-integrated phased array for airborne applications
68
An extremely low capacitance very low frequency RC active network
69
An extremely low consumption, 53mW, 65nm CMOS transmitter for 60 GHz UWB applications
70
An Extremely Low Contact-Resistance MEMS Relay Using Meshed Drain Structure and Soft Insulating Layer
71
An extremely low noise heterojunction IMPATT
72
An extremely low noise, phase lockable, sapphire loaded cavity based microwave oscillator
73
An extremely low power 2 GHz CMOS LC VCO for wireless communication applications
74
An Extremely low-noise 6-Gc nondegenerate parametric amplifier
75
An extremely low-noise InP-based HEMT with silicon nitride passivation
76
An Extremely Low-Power Bipolar Current-Mode I/O Circuit for Multi-Gbit/s Interfaces
77
An Extremely Low-Power CMOS Glare Sensor
78
An Extremely Low-Profile Ferrite-Loaded Wideband VHF Antenna Design
79
An extremely low-profile helical array antenna
80
An extremely low-profile MF monopole antenna design and measurement
81
An extremely low-profile ultra-wideband antenna with monopole-like radiation characteristics
82
An extremely miniaturized ultra wide band 10–67 GHz Power Splitter in 65 nm CMOS Technology
83
An extremely randomized trees approach for gesture unit segmentation
84
An extremely robust turbo coded HF modem
85
An extremely robust US based focal lesion servo system incorporating a servo recovery algorithm for a NIUTS
86
An extremely sensitive digital receiver for deep space satellite communications
87
An Extremely Simple Method of Determining Optimal Conductor Sections for Radial Distribution Feeders
88
An Extremely Simple Method of Determining Optimal Conductor Sections for Radial Distribution Feeders
89
An extremely small 26 GHz monolithic image-rejection mixer without DC power consumption
90
An extremely small transmission line antenna for DAB VHF band
91
An extremely small-angle scatterometer for measuring the phase function of turbid media
92
An extremely thin BGA format chip-scale package and its board level reliability
93
An extremely wide band balanced amplitude controller in coplanar waveguide technology
94
An extremely wideband planar monopole antenna with triple notched stop bands
95
An extremely wideband printed antenna for wireless communication systems
96
An extremely wideband printed antenna with WLAN stop band using SRR
97
An extremely wideband rectangular monopole antenna with a modified microstrip feed
98
An extremely wideband ridge waveguide filter
99
An extreme-point global optimization technique for convex hull pricing
100
An Extreme-Point Subdifferential Method for Convex Hull Pricing in Energy and Reserve Markets—Part I: Algorithm Structure
101
An Extreme-Point Subdifferential Method for Convex Hull Pricing in Energy and Reserve Markets—Part II: Convergence Analysis and Numerical Performance
102
An extremum approach to constant-delay transfer functions providing large amplitude bandwidth
103
An Extremum Principle for Shape from Contour
104
An extremum seeking algorithm for determining the set point temperature for condensed water in a cooling tower
105
An Extremum Seeking Algorithm for Message Batching in Total Order Protocols
106
An extremum seeking based control strategy for pantograph-catenary contact force of high-speed trains
107
An extremum seeking method for non-isometric neuromuscular electrical stimulation
108
An extremum-seeking controller for dynamic metamaterial antenna operation
109
An extrinsic calibration method for 3D range surface sensors: an application in radiotherapy patient positioning
110
An extrinsic component parameter extraction method for high power RF LDMOS transistors
111
An Extrinsic Fiber Fabry-Perot Interferometer for Dynamic Displacement Measurement
112
An Extrinsic Fibre Optic Interferometer with Possible Signal Fading Compensation for Vibrometric Applications
113
An extrinsic Kalman filter for iterative multiuser decoding
114
An Extrinsic Optical Fiber Bending Sensor: A Theoretical Investigation and Validation
115
An extrinsic silicon charge coupled device for detecting infrared radiation
116
An extrinsic-inductance independent approach for direct extraction of HBT intrinsic circuit parameters
117
An extrinsic-inductance independent approach for direct extraction of HBT intrinsic circuit parameters
118
An Extruded Polyplase Bus
119
An exTS based neuro-fuzzy algorithm for prognostics and tool condition monitoring
120
An Eye Detection Based Multi-modal "E-Supervisor" in Distant Education
121
An eye detection technique for clock and data recovery applications
122
An Eye Detector Based on Cues and Heuristics with a Good Accuracy/Complexity Trade-off
123
An eye feature detector based on convolutional neural network
124
An eye for an eye: A single camera gaze-replacement method
125
An eye for detail
126
An Eye For The New
127
An eye model for ocular pulse analysis
128
An Eye Movement Analysis Algorithm for a Multielement Target Tracking Task: Maximum Transition-Based Agglomerative Hierarchical Clustering
129
An eye movement communication-control system for the disabled
130
An Eye Movement Study on the Different Segmentations´ Effects on Han and Tibetan College Students´ Reading Habit
131
An Eye Movement Study on the Reading Process of Automobile Maintenance Test
132
An eye movement tracking type head mounted display for virtual reality system: evaluation experiments of a prototype system
133
An eye on design: Effective embedded system software
134
An eye on India: outsourcing debate continues
135
An eye on society [Engineering royal society]
136
An eye on the future: advances in eye care technology
137
An Eye on Visual Sensor Networks
138
An eye opener: low frame rates do not affect fixations
139
An eye state identification method based on the Embedded Hidden Markov Model
140
An Eye State Recognition Method for Drowsiness Detection
141
An Eye States Detection Method by Using WLBP
142
An Eye Toward Improving: A new training approach in ophthalmic anesthesia provides qualitative and quantitative feedback.?
143
An eye tracking computer user interface
144
An eye tracking database for stereoscopic video
145
An Eye Tracking Semantic Repository for User Profiling
146
An Eye Tracking Study on camelCase and under_score Identifier Styles
147
An Eye Tracking Study on Text Customization for User Performance and Preference
148
An eye tracking study on the effects of layout in understanding the role of design patterns
149
An eyeball-like biconvex/meniscus lens optical system with fluidic-controlled focus for tunable lens applications
150
An eye-glasses-like wearable eye gaze tracking system
151
An eye-hand system for automated paper recycling
152
An eye-in-hand deice for hand gesture-based human-robot interaction
153
An eye-in-hand stereo visual servoing for tracking and catching moving objects
154
An Eyes-Free In-car User Interface Interaction Style Based on Visual and Textual Mnemonics, Chording and Speech
155
An eye-to-hand visual servoing structure for 3D positioning of a robotic arm using one camera and a flat mirror
156
An Eyetracker Study of the Haptic Cuing of Visual Attention
157
An eyetracking study of estimation accuracy: Examining cerebellar tumours from Magnetic resonance spectroscopy graphs
158
An Eye-Tracking Study of Java Programmers and Application to Source Code Summarization
159
An eye-tracking-based adaptive multimedia streaming scheme
160
An eyperimental 1Mb cache DRAM with ECC
161
An EZBC based approach for polarimetric SAR data compression
162
An EZW compressed image technique for calculating texture signatures
163
An F.E.T. equivalent circuit
164
An F0 contour fitting model for singing synthesis
165
An F0 Control Model for Singing Synthesis based on Proportional-Integral-Derivative controller
166
An F0 modeling technique based on prosodic events for spontaneous speech synthesis
167
An F1 layer MUF prediction system for Northern latitudes
168
An F1 mobile application
169
An F8 Microprocessor-Based Breadboard for the Simulation of Communication Links Using Rate 1/2 Convolutional Codes and Viterbi Decoding
170
An face-based visual fixation system for prosthetic vision
171
An fast and efficient algorithm for spline filters
172
An fast integrated searching strategy and application in multi-source massive image database for Disaster Mitigation and Relief
173
An fast lock technique for wide band PLL frequency synthesizer design
174
An Fast Transparent Failover Scheme for Service Availability
175
An fault detection method based on compensation of SVMR
176
An F-band 20.6Gbp/s QPSK transmitter in 65nm CMOS
177
An F-band fundamental mixer using 75-nm InP HEMTs for precise spectrum analysis
178
An F-band mixer module with a built-in broadband IF amplifier for spectrum analysis with low intermodulation distortion
179
An F-band resistive mixer based on heterostructure field effect transistor technology
180
An FBAR/CMOS Frequency/Phase Discriminator and Phase Noise Reduction System
181
An FBG sensing system utilizing both WDM and a novel harmonic division scheme
182
An FBG sensor for strain and temperature discrimination at cryogenic regime
183
An FBG sensor system for low voltage AC signals
184
An FBP-type reconstruction method for CBCT with significantly displaced detector
185
An FCA-based mapping generator
186
An FCC compliant pulse generator for IR-UWB communications
187
An FCD Compensation Model Based on Traffic Condition Trends Matching
188
An FCD Information Processing Model under Traffic Signal Control
189
An FCM-based method to recognize and extract ripe tomato for harvesting robotic system
190
An FD approach for multirate sampled-data systems in the frequency domain
191
An FD/FDTD method for optical waveguide modeling
192
An FDC-based auto-calibration technique for ΔΣ fractional-N PLL
193
An FDD and TDD coexistence scheme for imbalanced traffic compensation
194
An FDD Multihop Cellular Network for 3GPP-LTE
195
An FDD wideband CDMA MAC protocol for wireless multimedia networks
196
An FDD wideband CDMA MAC protocol with minimum-power allocation and GPS-scheduling for wireless wide area multimedia networks
197
An FDDI bridge for the high-speed multimedia backbone LAN
198
An FDDI network for tactical applications
199
An FDDI-based reconfigurable network for fault-tolerant real-time communications
200
An FD-FD formulation for the analysis of the optical axis misalignment effect on propagation characteristics of anisotropic dielectric waveguides
201
An FDI approach for aircraft actuator lock-in-place fault
202
An FDI Approach for Aircraft Actuator Partial Failure
203
An FDI approach for sampled-data systems
204
An FDIA approach for aircraft based on the Kalman filter
205
An FDL-Based Photonic Switching Node for a Data Vortex Optical Packet Switched Interconnection Network
206
An FDL-based QoS scheduling algorithm in OBS networks
207
An FDM concept for GPS adaptive array antenna system
208
An FDM/PRMA cellular network with dynamic carrier allocation and distributed control
209
An FDO neural network model and its application to image recognition
210
An FDR-controlled, exploratory group modeling for assessing brain connectivity
211
An FDTD algorithm for simulation of EM waves propagation in laser with static and dynamic gain models
212
An FDTD algorithm for transient propagation in biological tissue with a Cole-Cole dispersion relation
213
An FDTD algorithm with perfectly matched layers for general dispersive media
214
An FDTD analysis of induced current in PEC wire which touched semi-infinite ground plane by using surface impedance boundary condition
215
An FDTD approach to the time-domain inverse scattering problem for a lossy cylindrical object
216
An FDTD formulation for dispersive media using a current density
217
An FDTD impedance boundary condition and its application to waveguide discontinuity analyses
218
An FDTD Interaction Scheme of a High-Intensity Nanosecond-Pulsed Electric-Field System for In Vitro Cell Apoptosis Applications
219
An FDTD method for analysis of scattering from rough fluid-fluid interfaces
220
An FDTD method with FFT-accelerated exact absorbing boundary conditions
221
An FDTD model for calculation of gradient-induced eddy currents in MRI system
222
An FDTD model for low and high altitude lightning-generated EM fields
223
An FDTD Model of a Thin Dispersive Layer
224
An FDTD Model of Graphene Intraband Conductivity
225
An FDTD multigrid based on multiresolution analysis
226
An FDTD near- to far-zone transformation for scatterers buried in stratified grounds
227
An FDTD optimization of a circularly polarized reflectarray unit cell
228
An FDTD Thin-Wire Model for Modeling Carbon Nanotube Dipoles at THz Regime
229
An FDTD/MoM hybrid technique for modeling complex antennas in the presence of heterogeneous grounds
230
An FDTD/MoMTD hybrid technique for modeling HF antennas located on lossy ground
231
An FDTD/ray-tracing analysis method for wave penetration through inhomogeneous walls
232
An FDTD-Based Parallel Virtual Tool for RCS Calculations of Complex Targets
233
An FDTD-Based Subsurface Imaging Virtual Tool for Testing UWB Antenna Array Characteristics
234
An FDTD-based tool for simulation of nonlinear interactions of guided waves
235
An FDTD-Touchstone hybrid technique for equivalent circuit modeling of SOP electronic packages
236
An FE Model to Study the Strain State of the Filaments of a \\hbox {Nb}_{3}\\hbox {Sn} Internal-Tin Strand Under Transverse Load
237
An FE Tool for the Electromagnetic Analysis of Slow-Wave Helicoidal Structures in Traveling Wave Tubes
238
An FEA/MATLAB based machine design tool for switched reluctance motors
239
An Feasible Optimization Algorithm for a Class of Nonlinear Multiplicative Problems
240
An FE-based Physical Phase Variable Model for PM Synchronous Machines Including Dynamic Core Losses
241
An FE-BI-MLFMA with GPU acceleration for electromagnetic scattering analysis
242
An FEC overlay for idle slot utilization for IS-136
243
An FEC-based error control scheme for wireless MPEG-4 video transmission
244
An FEC-based Reliable Data Transport Protocol for Underwater Sensor Networks
245
An FE-Investigation of the State of Stress and Fracture Mechanics Properties of Intermetallic Compounds
246
An FEM analysis of the temperature rise distribution in a GMR head due to the sense current and contact resistance
247
An FEM analysis of the temperature rise distribution in a GMR head due to the sense current and contact resistance
248
An FEM approach with FFT accelerated iterative robin boundary condition for electromagnetic scattering of a target with strong or weak coupled underlying randomly rough surface
249
An FEM-based method for analysis of the dynamic behavior of AC contactors
250
An FEM-based numerical diffraction coefficient for irregular wedge configurations
251
An FES cycling control system based on CPG
252
An FES-assisted training strategy combined with impedance control for a lower limb rehabilitation robot
253
An FET chip-level cell combiner
254
An FET oscillator element for spatially injection locked arrays
255
An FET-Based Unit Cell for an Active Magnetic Metamaterial
256
An FETD approach for the modeling of antennas
257
An FETD Method for Wave guide Problems
258
An FET-driven power thyristor
259
An FET-level linearization method using a predistortion branch FET
260
An FFAG Compressor and Accelerator Ring Studied for the German Spallation Neutron Source
261
An FFT algorithm based fast algorithm for arbitrary polynomial transformation
262
An FFT Approach for Efficient OFDM Communication Systems
263
An fft approach to large array analysis
264
An FFT approximation technique suitable for on-chip generation and analysis of sinusoidal signals
265
An FFT based algorithm for particle charge measurement in the presence of a square-wave excitation field using Phase Doppler Anemometry
266
An FFT based technique for suppressing narrow-band interference in PN spread spectrum communications systems
267
An FFT chart
268
An FFT Core for DVB-T/DVB-H Receivers
269
An FFT core for DVB-T2 receivers
270
An FFT for the 2-sphere and applications
271
An FFT implementation of the generalized maximum likelihood algorithm for image smoothing
272
An FFT method for generating bandlimited Gaussian noise variates
273
An FFT multiple half-screen diffraction model
274
An FFT processor based on the SIC architecture with asynchronous PE
275
An FFT systolic processor and its applications
276
An FFT T-matrix method for scattering solutions from inhomogeneous bodies and random discrete scatterers
277
An FFT Twofold Subspace-Based Optimization Method for Solving Electromagnetic Inverse Scattering Problems
278
An FFT/IFFT Design versus Altera and Xilinx Cores
279
An FFT-Accelerated Integral-Equation Solver for Analyzing Scattering in Rectangular Cavities
280
An FFT-Accelerated Time-Domain Multiconductor Transmission Line Simulator
281
An FFT-based acquisition algorithm for spread-spectrum signal in high dynamic
282
An FFT-based acquisition scheme for DS-CDM a systems
283
An FFT-based algorithm for computation of Gabor transform with its application to cloud detection/classification
284
An FFT-based algorithm for multichannel blind deconvolution
285
An FFT-based approach to including non-ideal ground planes in a fast 3-D inductance extraction program
286
An FFT-Based DS-SS Signal Acquisition Algorithm Research
287
An FFT-based fault tolerant FIR adaptive filter
288
An FFT-based formulation for 3D PEC scatterers in the resonance region
289
An FFT-based jitter separation method for high-frequency jitter testing with a 10x reduction in test time
290
An FFT-Based Method for Blind Identification of FIR SIMO Channels
291
An FFT-based method to evaluate and compensate gain and offset errors of interleaved ADC systems
292
An FFT-based multiuser detection for asynchronous block-spreading CDMA ultra wideband communication systems
293
An FFT-based novel approach to noninvasive speed measurement in induction motor drives
294
An FFT-Based Technique and Best-first Search for Image Registration
295
An FFT-based technique for translation, rotation, and scale-invariant image registration
296
An FFT-based visual quality metric robust to spatial shift
297
An FGPA Based General Purpose DAQ Module for the KLOE-2 Experiment
298
An FHMA acoustic communication system for multiple underwater robots
299
An FIB Method Using Progressive Multi-Cut Technique & Application in Failure Analysis of Wafer Fabrication
300
An finite-state Markov channel model for ACM scheme in WiMAX
301
An FIR approach to the discrimination of damped sinusoids
302
An FIR cascade structure for adaptive linear prediction
303
An FIR Channel Estimation Filter with Robustness to Channel Mismatch Condition
304
An FIR digital filter using one-hot coded residue representation
305
An FIR estimation filter based on the sampling theorem
306
An FIR image interpolation filter design method based on properties of human vision
307
An FIR Implementation of Zero Frequency Filtering of Speech Signals
308
An fir predictor interpretation of LS estimation of sinusoidal amplitudes followed by extrapolation
309
An FIR processor with programmable dynamic data ranges
310
An FIR-Embedded Noise Filtering Method for \\Delta \\Sigma Fractional-N PLL Clock Generators
311
An FLMS based two-microphone speech enhancement system for in-car applications
312
An Fm Audio Lsi for Vhs Vcrs Using Digital Signal
313
An FM demodulation algorithm with an undersampling rate
314
An FM demodulator operating across 2–10GHz IF
315
An FM Detector for Low S/N
316
An FM Electronics System for Biomedical Data Recording
317
AN FM Front End with a High Gain Unneutralized JFET
318
An FM Microwave Radio Relay
319
An FM multiplex broadcasting system for traffic information services
320
An FM subcarrier data broadcast on bus transportation status indication system
321
An FM subcarrier data broadcast system for bus transportation status
322
An FM Telemetry Demodulator for Telephone Pacemaker Clinics
323
An FM Tuner Using MOS-FET´s and Integrated Circuits
324
An FM/cw breadboard ladar using a 32-element linear self-mixing detector array
325
An FMCW MIMO radar calibration and mutual coupling compensation approach
326
An FMCW Radar for Accurate Level Measurements
327
An FM-CW Radar for Simultaneous Three-Dimensional Velocity and Altitude Measurement
328
An FM-CW Radar for Simultaneous Three-Dimensional Velocity and Altitude Measurement
329
An FM-CW radar module with front-end switching heterodyne receiver
330
An FMCW radar sensor for collision avoidance
331
An FMDLL based dual-loop frequency synthesizer for 5 GHz WLAN applications
332
An FMM-FFT accelerated integral equation solver for characterizing electromagnetic wave propagation in mine tunnels and galleries loaded with conductors
333
An FMO based error resilience method in H.264/AVC and its UEP application in DVB-H link layer
334
An fMRI activation method using complex data
335
An fMRI analysis of the efficacy of Euler diagrams in logical reasoning
336
An fMRI compatible haptic interface with pneumatic actuation
337
An fMRI investigation in oculomotor learning through vergence eye movements
338
An fMRI investigation of a memory guided vergence task: Insights to the parahippocampal area
339
An fMRI pilot study evaluating brain activation during different finger training exercises
340
An fMRI pilot study to evaluate brain activation associated with locomotion adaptation
341
An fMRI study of abrupt-awake episodes during behavioral microsleeps
342
An fMRI study of brain processing related to stress states
343
An fMRI study of Chinese sign language in functional cortex of prelingual deaf signers
344
An fMRI Study of Chinese Sign Language in Functional Cortex of Prelingual Deaf Signers
345
An fMRI study of happiness by inducing positive affect states
346
An fMRI study on the effect of distance in the shifting of visuospatial attention
347
An fMRI Study on the Effects of Electrical Stimulation as Biofeedback
348
An fMRI Study on the Spectral and Spatial Properties of Steady-State Visual Evoked Response
349
An fMRI-compatible multi-configurable handheld response system using an intensity-modulated fiber-optic sensor
350
An FM-UWB transceiver with M-PSK subcarrier modulation and regenerative FM demodulation
351
An fNIRS study of taste cortical areas in human brain: Sweetness and sourness
352
An fNIRS-based BCI for mental arithmetic task using ICA
353
An FNN-Based adaptive iterative learning control for a class of nonlinear discrete-time systems
354
An focal plane array space variant model for PMMW imaging
355
An foF2 departure index and its relevance to central European HF signal quality records. II
356
An FPGA acceleration of a level set segmentation method
357
An FPGA aligner for short read mapping
358
An FPGA application with high speed serial transceiver running at sub nominal rate
359
An FPGA approach of channel decoder for DAB test receiver
360
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
361
An FPGA architecture design of parameter-adaptive real-time image processing system for edge detection
362
An FPGA architecture for CABAC decoding in manycore systems
363
An FPGA architecture for data-path applications
364
An FPGA architecture for DRAM-based systolic computations
365
An FPGA architecture for high speed edge and corner detection
366
An FPGA architecture for low density parity check codes
367
An FPGA architecture for real-time polyphase 2D FIR double-trapezoidal plane-wave filters
368
An FPGA architecture for solving the Table Maker´s Dilemma
369
An FPGA architecture for the Pagerank eigenvector problem
370
An FPGA Architecture of Stable-Sorting on a Large Data Volume : Application to Video Signals
371
An FPGA architecture supporting dynamically controlled power gating
372
An FPGA arithmetic logic unit for computing scalar multiplication using the half-and-add method
373
An FPGA based 1-bit all digital transmitter employing Delta-Sigma Modulation with RF output for SDR
374
An FPGA based accelerator for discrete Hartley and fast Hadamard transforms
375
An FPGA based accelerator for SAT based combinational equivalence checking
376
An FPGA based Adaptive Weightless Neural Network Hardware
377
An FPGA Based All-Digital Transmitter with Radio Frequency Output for Software Defined Radio
378
An FPGA based approach for nonlinear characterization of Electrocardiographic data
379
An FPGA based approach for the enhancement of COTS switch ASICs with real-time Ethernet functions
380
An FPGA based approach to increased flexibility, modularity and integration of low level control in robotics research
381
An FPGA based architecture for complex rule matching with stateful inspection of multiple TCP connections
382
An FPGA Based Architecture of a Novel Reconfigurable Radio Processor for Software Defined Radio
383
An FPGA Based Arrhythmia Recognition System for Wearable Applications
384
An FPGA based configurable I/O system for AC drive controllers
385
An FPGA based coprocessor for 3D affine transformations
386
An FPGA based coprocessor for calculating Grey level co-occurrence matrix
387
An Fpga Based Coprocessor for Cancer Classification Using Nearest Neighbour Classifier
388
An FPGA based co-processor for GLCM texture features measurement
389
An FPGA based coprocessor for large matrix product implementation
390
An FPGA based cut-through switch optimized for one-step PTP and real-time Ethernet
391
An FPGA based DAQ system for the readout of Madeira PET probe
392
An FPGA based DAQ system for the readout of SiPM matrices in PET applications
393
An FPGA based decimation filter processor design for real-time continuous-time Σ−Δ modulator performance measurement and evaluation
394
An FPGA based diagnostic tool for jitter optimization in serial high-speed transceivers
395
An FPGA based Digital Control Design for high-frequency DC-DC Converters
396
An FPGA based digital radar receiver for soft radar
397
An FPGA Based Ecosystem for USBPHY Validation
398
An FPGA Based Facial Component Extractor using Wavelet-Based Salient Points
399
An FPGA based FIFO with efficient memory management
400
An FPGA based GEMROC readout system
401
An FPGA based general purpose data acquisition controller
402
An FPGA- Based General-Purpose Data Acquisition Controller
403
An FPGA based generic prototyping platform employed in a CMOS laser Doppler blood flow camera
404
An FPGA based hardware accelerator for real time video segmentation system
405
An FPGA based high speed IEEE-754 double precision floating point multiplier using Verilog
406
An FPGA based HSR architecture for seamless PROFINET redundancy
407
An FPGA Based Hybrid Processor Emulation Platform
408
An FPGA Based Implementation for Real-Time Processing of the LHC Beam Loss Monitoring System´s Data
409
An FPGA based implementation of a flexible digital PID controller for a motion control system
410
An FPGA based implementation of baseband and passband modulation for wireless transmitters
411
An FPGA based implementation of G.729
412
An FPGA based low power multiplier for FFT in OFDM systems using precomputations
413
An FPGA based Measurement System for a Fibre Bragg Grating (FBG) Strain Sensor
414
An FPGA Based Memory Efficient Shared Buffer Implementation
415
An FPGA based minimum inductance sensor-less technique for Switched Reluctance Motors
416
An FPGA Based Motion Control IC and Its Application to Robotic Manipulators
417
An FPGA based move generator for the game of chess
418
An FPGA- based multiple-output PWM pulse generator for ultrasonic cleaning machines
419
An FPGA based on-board processor platform for space application
420
An FPGA Based Open Source Network-on-Chip Architecture
421
An FPGA based parameterisable system for discrete Hartley transforms implementation
422
An FPGA based parameterizable system for matrix product implementation
423
An FPGA based parametrisable system for Discrete Orthogonal Transforms implementation
424
An FPGA based passive k-delta-1-sigma modulator
425
An FPGA Based PCI-E Root Complex Architecture for Standalone SOPCs
426
An FPGA Based Performance Analysis of Pipelining and Unrolling of AES Algorithm
427
An FPGA based platform for real time robot localization
428
An FPGA based power quality monitoring system
429
An FPGA based processor for Elliptic Curve Cryptography
430
An FPGA based prototyping platform for imager-on-chip applications
431
An FPGA Based Rapid Prototyping of the Rake Receiver in a MIMO Environment
432
An FPGA based rapid prototyping platform for MIMO systems
433
An FPGA based real-time remote temperature measurement system
434
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
435
An FPGA based reconfigurable coprocessor board utilizing a Mathematics of Arrays
436
An FPGA Based Resources Efficient Solution for the OmniVision Digital VGA Cameras Family
437
An fpga based rf link for power and full duplex data transfer
438
An FPGA based semi-parallel architecture for higher order Moving Target Indication (MTI) processing
439
An FPGA based SIMD processor with a vector memory unit
440
An FPGA based simulation acceleration platform for spiking neural networks
441
An FPGA based slave communication controller for Industrial Ethernet
442
An FPGA based stand-alone solar tracking system
443
An FPGA based stereoptic image capture system
444
An FPGA based system for discrete Hartley transforms
445
An FPGA Based TCM Fingerprint Similarity Analyzer
446
An FPGA based teletext inserter chip
447
An FPGA based temperature controller for Differential Thermal Analyzer
448
An FPGA Based Test Bed for Bio Inspired Computation
449
An FPGA Based Travelling-Wave Fault Location System
450
An FPGA based trigger and RFI filter for radio detection of cosmic rays
451
An FPGA based verification platform for HyperTransport 3.x
452
An FPGA Based VQ for Speaker Identification
453
An FPGA based Walsh Hadamard transforms
454
An FPGA bridge preserving traffic quality of service for on-chip network-based systems
455
An FPGA chip identification generator using configurable ring oscillator
456
An FPGA Chip Identification Generator Using Configurable Ring Oscillators
457
An FPGA compatible asynchronous wake-up receiver for Wireless Sensor Networks
458
An FPGA computing demo core for space charge simulation
459
An FPGA configuration circuit based on JTAG
460
An FPGA configuration circuit used for fast and partial configuration
461
An FPGA Connect6 Solver with a two-stage pipelined evaluation
462
An FPGA control application: Self-control of current and linear control of DC link of PFC
463
An FPGA controlled DC/DC step-up converter for automotive applications
464
An FPGA controlled digital beamforming radar sensor with three-dimensional imaging capability
465
An FPGA controlled WDM buffer memory
466
An FPGA controller for a combined solar / Wind power system
467
An FPGA controller for deterministic guaranteed-rate optical packet switching
468
An FPGA controller for the image transceiver device
469
An FPGA co-processor for adaptive lane departure warning system
470
An FPGA co-processor implementation of Homomorphic Encryption
471
An FPGA Correlation-Edge Distance approach for disparity map
472
An FPGA correlator for continuous real-time measurement of particulate flow
473
An FPGA cost estimation technique for design space exploration (DSE)
474
An FPGA design and implementation framework combined with commercial VLSI CADs
475
An FPGA Design Flow for Reconfigurable Network-Based Multi-Processor Systems on Chip
476
An FPGA design for evaluating score function in protein energy calculation
477
An FPGA design for the stochastic Greenberg-Hastings cellular automata
478
An FPGA design framework for large-scale spiking neural networks
479
An FPGA design of a unified hash engine for IPSec authentication
480
An FPGA design of low power LDPC decoder for high-speed wireless LAN
481
An FPGA Design Project: Creating a PowerPC Subsystem Plus User Logic
482
An FPGA Design Project: Creating a PowerPC Subsystem Plus User Logic
483
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
484
An FPGA embedded system architecture for handwritten symbol recognition
485
An FPGA family optimized for high densities and reduced routing delay
486
An FPGA for implementing asynchronous circuits
487
An FPGA for multi-chip reconfigurable logic
488
An FPGA Framework for Genetic Algorithms: Solving the Minimum Energy Broadcast Problem
489
An FPGA hardware acceleration of the indirect calculation of tree lengths method for phylogenetic tree reconstruction
490
An FPGA hardware architecture of Nilsimsa fingerprinting algorithm
491
An FPGA hardware implementation of the Rijndael block cipher
492
An FPGA HIL Reconfigurable Testing Platform for Vehicular Traction Systems
493
An FPGA implementation and comparison of the SHA-256 and Blake-256
494
An FPGA implementation and performance evaluation of the seed block cipher
495
An FPGA implementation architecture for decoding of polar codes
496
An FPGA implementation efficient equalizer for ISI removal in wireless applications
497
An FPGA implementation for a high throughput adaptive filter using distributed arithmetic
498
An FPGA implementation for a high-speed optical link with a PCIe interface
499
An FPGA Implementation for a Kalman Filter with Application to Mobile Robotics
500
An FPGA Implementation for Solving Least Square Problem
501
An FPGA implementation method of OFDM timing synchronization based on conjugated-symmetrical-structured training sequence
502
An FPGA implementation of 1,024-neuron system for PAPR reduction of OFDM signal
503
An FPGA implementation of 200MBPS CI/OFDM modem for satellite communication systems
504
An FPGA implementation Of 2-D CNN gabor-type filter
505
An FPGA implementation of 30Gbps security module for GPON systems
506
An FPGA implementation of 3D affine transformations
507
An FPGA implementation of 3D numerical simulations on a 2D SIMD array processor
508
An FPGA implementation of 3-D signal transmission system
509
An FPGA implementation of a brushless DC motor speed controller
510
An FPGA Implementation of a Competitive Hopfield Neural Network for Use in Histogram Equalization
511
An FPGA implementation of a data-bit asynchronous GPS/GLONASS correlator
512
An FPGA Implementation of a Digital Coriolis Mass Flow Metering Drive System
513
An FPGA implementation of a DWT with 5/3 filter using semi-programmable hardware
514
An FPGA implementation of a Feed-Back Chaotic Synchronization for secure communications
515
An FPGA implementation of a flexible architecture for H.263 video coding
516
An FPGA implementation of a flexible architecture for H.263 video coding
517
An FPGA implementation of a flexible, parallel image processing architecture suitable for embedded vision systems
518
An FPGA Implementation of a Fully Verified Double Precision IEEE Floating-Point Adder
519
An FPGA Implementation of a High Resolution Phase Shift Beamformer
520
An FPGA Implementation of a Hopfield Optimized Block Truncation Coding
521
An FPGA implementation of a modified version of RED algorithm
522
An FPGA implementation of a phylogenetic tree reconstruction algorithm using an alternative second-pass optimization
523
An FPGA Implementation of a Quadruple-Based Multiplier for 4D Clifford Algebra
524
An FPGA implementation of a Restricted Boltzmann Machine classifier using stochastic bit streams
525
An FPGA Implementation of a Scalable Network-on-Chip Based on the Token Ring Concept
526
An FPGA implementation of a self-tuned fuzzy controller
527
An FPGA implementation of a simple lossless data compression coprocessor
528
An FPGA implementation of a snoop cache with synchronization for a multiprocessor system-on-chip
529
An FPGA implementation of a soft-in soft-out decoder for block codes
530
An FPGA implementation of a special purpose processor for steganography
531
An FPGA implementation of a structured irregular LDPC decoder
532
An FPGA implementation of a threat-based strategy for Connect6
533
An FPGA implementation of a voltage-oriented controlled three-phase PWM boost rectifier
534
An FPGA implementation of AES with fault analysis countermeasures
535
An FPGA implementation of AES with support for counter and feedback modes
536
An FPGA implementation of Alamouti´s transmit diversity technique applied to an OFDM system
537
An FPGA implementation of an all digital phase locked loop for control applications
538
An FPGA implementation of an Artificial Neural Network for prediction of cetane number
539
An FPGA implementation of an OFDM adaptive modulation system
540
An FPGA implementation of an on-line radix-4 CORDIC 2-D IDCT core
541
An FPGA Implementation of Array LDPC Decoder
542
An FPGA implementation of ATA Host Controller toward scalable iATA NAS
543
An FPGA implementation of chaotic and edge enhanced error diffusion
544
An FPGA implementation of complex valued independent component analysis for real-time interference canceler
545
An FPGA Implementation of Decision Tree Classification
546
An FPGA Implementation of Dirty Paper Precoder
547
An FPGA implementation of discrete Hartley transforms
548
An FPGA implementation of dynamic reconfigurable lifting-based wavelet packet processor for real-time scalable audio coding
549
An FPGA implementation of energy saving embedded system with multiple vision sensors
550
An FPGA Implementation of Explicit-State Model Checking
551
An FPGA Implementation of Finite Horizon Constrained Optimization for a Full Digital Amplifier
552
An FPGA Implementation of Frequency Output
553
An FPGA implementation of full-search variable block size motion estimation
554
An FPGA implementation of GENET for solving graph coloring problems
555
An FPGA Implementation of Gradient Based Edge Detection Algorithm Design
556
An FPGA Implementation of Hierarchical Motion Estimation for Embedded Object Tracking
557
An FPGA implementation of high speed and area efficient double-precision floating point multiplier using Urdhva Tiryagbhyam technique
558
An FPGA Implementation of High Throughput Stochastic Simulator for Large-Scale Biochemical Systems
559
An FPGA implementation of high-throughput key-value store using Bloom filter
560
An FPGA implementation of image signature based visual-saliency detection
561
An FPGA Implementation of Improved AODV Routing Protocol for Route Repair Scheme
562
An FPGA Implementation of Information Theoretic Visual-Saliency System and Its Optimization
563
An FPGA implementation of insect-inspired motion detector for high-speed vision systems
564
An FPGA implementation of Kak´s instantaneously-trained, Fast-Classification neural networks
565
An FPGA Implementation of K-Means Clustering for Color Images Based on Kd-Tree
566
An FPGA implementation of LDPC simulation platform
567
An FPGA Implementation of Linear Kernel Support Vector Machines
568
An fpga implementation of Low Density Parity-Check CodeS construction & decoding
569
An FPGA implementation of low-density parity-check code decoder with multi-rate capability
570
An FPGA implementation of low-latency video transmission system using lossless and near-lossless line-based compression
571
An FPGA Implementation of MML-DFE for Spatially Multiplexed MIMO Systems
572
An FPGA implementation of motion estimation algorithm for H.264/AVC
573
An FPGA Implementation of Multiple Sequence Alignment Based on Carrillo-Lipman Method
574
An FPGA implementation of NIST 256 prime field ECC processor
575
An FPGA implementation of parallel ICA for dimensionality reduction in hyperspectral images
576
An FPGA Implementation of Pattern-Selective Pyramidal Image Fusion
577
An FPGA implementation of pipelined multiplicative division with IEEE Rounding
578
An FPGA implementation of real-time QRS detection
579
An fpga implementation of real-time retinex video image enhancement
580
An FPGA Implementation of Reconfigurable Real-Time Vision Architecture
581
An FPGA implementation of shift converter block technique on FIFO for RS232 to universal serial bus converter
582
An FPGA implementation of shift converter block technique on FIFO for UART
583
An FPGA implementation of speech recognition with weighted finite state transducers
584
An FPGA implementation of the AES with fault detection countermeasure
585
An FPGA implementation of the asynchronous programmable neighborhood mechanism for WTM Self-Organizing Map
586
An FPGA implementation of the ATM layer
587
An FPGA Implementation of the Distributed Arithmetic Based Quaternionic Multipliers for Paraunitary Filter Banks
588
An FPGA implementation of the fast gradient method for solving the Model Predictive Pulse Pattern Control problem
589
An FPGA implementation of the flexible triangle search algorithm for block based motion estimation
590
An FPGA implementation of the floating point addition
591
An FPGA Implementation of the Hestenes-Jacobi Algorithm for Singular Value Decomposition
592
An Fpga implementation of the HME self-synchronizing stream cipher for Enhanced security and performance
593
An FPGA Implementation of the LMS Adaptive Filter for Audio Processing
594
An FPGA implementation of the LMS adaptive filter for MEMS gyroscope
595
An FPGA implementation of the local global graph-based voice biometric authentication scheme
596
An FPGA implementation of the NTRUEncrypt cryptosystem
597
An FPGA Implementation of the Resolve Time-Based True Random Number Generator With Quality Control
598
An FPGA Implementation of the Searcher Algorithm
599
An FPGA implementation of the SHA-3: The BLAKE hash function
600
An FPGA implementation of the simplex algorithm
601
An FPGA implementation of the time domain deadbeat algorithm for control applications
602
An FPGA Implementation of the ZUC Stream Cipher
603
An FPGA implementation of triangle mesh decompression
604
An FPGA implementation of wait-free data synchronization protocols
605
An FPGA implementation of Walsh-Hadamard transforms for signal processing
606
An FPGA implementation of whitted-style ray tracing accelerator
607
An FPGA implemented 24-bit audio DAC with 1-bit sigma-delta modulator
608
An FPGA implemented PMSM servo drive: practical issues
609
An FPGA Implemented Processor Architecture with Adaptive Resolution
610
An FPGA interpolation processor for soft-decision Reed-Solomon decoding
611
An FPGA interpreter with virtual hardware management
612
An FPGA Memory Hierarchy for High-level Synthesized OpenCL Kernels
613
An FPGA model for developing dynamic circuit computing
614
An FPGA network architecture for accelerating 3DES - CBC
615
An FPGA platform for generation of stimulus triggering based on intracortical spike activity in brain-machine-body interface (BMBI) applications
616
An FPGA processor for real-time, fixed-point refinement of CDVS keypoints
617
An FPGA prototype of a forward error correction (FEC) decoder for ATSC digital TV
618
An FPGA prototype of current and voltage predictive controller for high switching frequency buck converter
619
An FPGA receiver for CPSK spread spectrum signaling
620
An Fpga Receiver For Wireless Lans Employing Cpsk Spread Spectrum Signaling
621
An FPGA Router for Alternative Reconfiguration Flows
622
An FPGA run-time system for dynamical on-demand reconfiguration
623
An FPGA sliding window-based architecture harris corner detector
624
An FPGA softcore based implementation of a bird call recognition system for sensor networks
625
An FPGA Software Defined Radio Platform with a High-Level Synthesis Design Flow
626
An FPGA Solution for Radiation Dose Calculation
627
An FPGA Solver for Large SAT Problems
628
An FPGA Solver for SAT-Encoded Formal Verification Problems
629
An FPGA Solver for Very Large SAT Problems
630
An FPGA solver for WSAT algorithms
631
An FPGA synthesis of the distributed control systems designed with Petri nets
632
An FPGA system using fuzzy clustering and correlation to diagnose angina
633
An FPGA task allocator with preliminary First-Fit 2D packing algorithms
634
An FPGA top-hat transform module with two different structure elements
635
An FPGA wave union TDC for time-of-flight applications
636
An FPGA with power-gated switch blocks
637
An FPGA/SoC Approach to On-Board Data Processing Enabling New Mars Science with Smart Payloads
638
An FPGA/SOPC open system for designing and testing controllers
639
An FPGA-accelerated testbed for hardware component development in MIMO wireless communication systems
640
An FPGA-Assisted Cloud Framework for Massive ECG Signal Processing
641
An FPGA-based 4K UHDTV H.264/AVC video decoder
642
An FPGA-based 5 Gbit/s D-QPSK modem for E-band point-to-point radios
643
An FPGA-based 64-channel DAQ system using linear time-over-threshold scheme for a continuous crystal PET detector
644
An FPGA-based 77 GHZ MEMS radar signal processing system for automotive collision avoidance
645
An FPGA-based acceleration platform for auction algorithm
646
An FPGA-Based Accelerator for Analog VLSI Artificial Neural Network Emulation
647
An FPGA-based accelerator for cortical object classification
648
An FPGA-Based Accelerator for Neighborhood-Based Collaborative Filtering Recommendation Algorithms
649
An FPGA-based accelerator for rapid simulation of SC decoding of polar codes
650
An FPGA-based accelerator implementation for deep convolutional neural networks
651
An FPGA-Based Accelerator to Speed-Up Matrix Multiplication of Floating Point Operations
652
An FPGA-based all-digital 802.11b & 802.15.4 receiver for the Software Defined Radio paradigm
653
An FPGA-Based Application-Specific Processor for Efficient Reduction of Multiple Variable-Length Floating-Point Data Sets
654
An FPGA-based approach for parameter estimation in spiking neural networks
655
An FPGA-Based Architecture for ECC Point Multiplication
656
An FPGA-based architecture for linear and morphological image filtering
657
An FPGA-Based Architecture for Local Similarity Measure for Image/Video Processing Applications
658
An FPGA-based architecture for real time image feature extraction
659
An FPGA-based array processor for an ionospheric-imaging radar
660
An FPGA-based ATE extension module for low-cost multi-GHz memory test
661
An FPGA-based back end for real time, multi-beam transient searches over a wide dispersion measure range
662
An FPGA-based bunch-to-bunch feedback system at the Advanced Photon Source
663
An FPGA-based Classification Architecture on Riemannian Manifolds
664
An FPGA-based coded excitation system for ultrasonic imaging using a second-order, one-bit sigma-delta modulator
665
An FPGA-based cognitive radio framework
666
An FPGA-based CollisionWarning System Using Hybrid Approach
667
An FPGA-Based Communication Scheme of Classical Channel in High-Speed QKD System
668
An FPGA-based Configurable Network Interface System
669
An FPGA-based coprocessor for ATM firewalls
670
An FPGA-based coprocessor for image processing
671
An FPGA-based coprocessor for the parsing of context-free grammars
672
An FPGA-based coprocessor for the SPHINX speech recognition system: early experiences
673
An FPGA-based custom coprocessor for automatic image segmentation applications
674
An FPGA-Based Custom High Performance Interconnection Network
675
An FPGA-based data acquisition and processing system for the MATMOS FTIR instrument
676
An FPGA-based data acquisition system for a 95 GHz W-band radar
677
An FPGA-Based Data Flow Engine for Gaussian Copula Model
678
An FPGA-based daughtercard for TI´s c6000 family of DSKs
679
An FPGA-Based Design of Efficient QKD Sifting Module
680
An FPGA-based development platform for real-time solid state devices
681
An FPGA-based Digital Camera System controlled from an LCD Touch Panel
682
An FPGA-based digital class-D amplifier using short word-length
683
An FPGA-based digital class-D amplifier with power supply error correction
684
An FPGA-based digital control and communication module for space power management and distribution systems
685
An FPGA-based digital control development method for power electronics
686
An FPGA-Based Digital Modulator for Full- or Half-Bridge Inverter Control
687
An FPGA-based digital predistorter for RF power amplifier linearization using cross-memory polynomial model
688
An FPGA-based dimmable CCFL driving system for LCD backlight
689
An FPGA-Based Distributed Computing System with Power and Thermal Management Capabilities
690
An FPGA-based distributed IP watermarking method
691
An FPGA-Based Dynamically Reconfigurable Platform: From Concept to Realization
692
An FPGA-based eigenfilter using fast Hebbian learning
693
An FPGA-Based Electronic Cochlea with Dual Fixed-Point Arithmetic
694
An FPGA-Based Embedded Robust Speech Recognition System Designed by Combining Empirical Mode Decomposition and a Genetic Algorithm
695
An FPGA-Based Embedded System for a Sailing Robot
696
An FPGA-Based Embedded System for Fingerprint Matching Using Phase-Only Correlation Algorithm
697
An FPGA-based embedded system for portable and cost-efficient bio-sensing: A low-cost controller for biomedical diagnosis
698
An FPGA-based embedded wideband audio codec system
699
An FPGA-Based Experiment Platform for Multi-Core System
700
An FPGA-based fail-soft system with adaptive reconfiguration
701
An FPGA-based fan beam image reconstruction module
702
An FPGA-based fast two-symbol processing architecture for JPEG 2000 arithmetic coding
703
An FPGA-based fixed-point architecture for binary logarithmic computation
704
An FPGA-based floating-point Jacobi iterative solver
705
An FPGA-based floating-point processor array supporting a high-precision dot product
706
An FPGA-based Focal Plane Array interface for the Panchromatic Fourier Transform Spectrometer
707
An FPGA-based framework for run-time injection and analysis of soft errors in microprocessors
708
An FPGA-Based Framework for Technology-Aware Prototyping of Multicore Embedded Architectures
709
An FPGA-Based Fully Synchronized Design of a Bilateral Filter for Real-Time Image Denoising
710
An FPGA-Based Gain-Scheduled Controller for Resonant Converters Applied to Induction Cooktops
711
An FPGA-based genetic microarray processing device
712
An FPGA-based hardware accelerator for simulating spatiotemporal neurons
713
An FPGA-based hardware emulator for fast fault emulation
714
An FPGA-Based Hardware Implementation of Configurable Pixel-Level Color Image Fusion
715
An FPGA-based hardware implementation of visual based fall detection
716
An FPGA-based heterogeneous coarse-grained dynamically reconfigurable architecture
717
An FPGA-based high-performance wireless vibration analyzer
718
An FPGA-based high-speed emulation system for powerline channels
719
An FPGA-based High-Speed, Low-Latency Processing System for High-Energy Physics
720
An FPGA-based high-speed, low-latency trigger processor for high-energy physics
721
An FPGA-based implementation and simulation of the AAL type 2 receiver
722
An FPGA-based implementation for repeated square-and-multiply polynomials
723
An FPGA-based implementation of a pre-processing stage for ECG signal analysis using DWT
724
An FPGA-based implementation of HW/SW architecture for CFAR radar target detector
725
An FPGA-Based Implementation of Multi-Alphabet Arithmetic Coding
726
An FPGA-Based Implementation of Spatio-Temporal Object Segmentation
727
An FPGA-based implementation of the MINRES algorithm
728
An FPGA-based implementation of variable fractional delay filter
729
An FPGA-based infant monitoring system
730
An FPGA-based In-Line Accelerator for Memcached
731
An FPGA-based in-line accelerator for Memcached
732
An FPGA-Based Instrument for the Estimation of R , L , and
733
An FPGA-based intellectual property protection method at physical design level
734
An FPGA-based interface for recording high-speed data stream
735
An FPGA-based irrational decimator for digital receivers
736
An FPGA-based key-store for improving the dependability of security services
737
An FPGA-Based Linear All-Digital Phase-Locked Loop
738
An FPGA-based lithium-ion battery charger system
739
An FPGA-based lock-in detection system to enable Chemical Species Tomography using TDLAS
740
An FPGA-based low-cost frame grabber for image processing applications
741
An FPGA-based MIMO-OFDM with Golden decoding
742
An FPGA-based mixed-signal controller for switching mode converters
743
An FPGA-Based Mobile Robot Controller
744
An FPGA-based MOS circuit simulator
745
An FPGA-based motion-vision integrated system for real-time machine vision applications
746
An FPGA-based MPSoC for real-time ECG analysis
747
An FPGA-based multi-core platform for testing and analysis of architectural techniques
748
An FPGA-Based Multicore System for Real-Time Bearing Fault Diagnosis Using Ultrasampling Rate AE Signals
749
An FPGA-based multi-core system for synthetic aperture radar data processing
750
An FPGA-Based Multiple-Axis Motion Control Chip
751
An FPGA-based multi-rate interpolator with real-time rate change for a JET test-bench system
752
An FPGA-based MVDR Beamformer Using Dichotomous Coordinate Descent Iterations
753
An FPGA-Based Network Intrusion Detection Architecture
754
An FPGA-Based Neural Network Digital Channel Equalizer
755
An FPGA-Based Novel Architecture for the Fixed-Point Binary Antilogarithmic Computation
756
An FPGA-Based Novel Digital PWM Control Scheme for BLDC Motor Drives
757
An FPGA-based object detector with dynamic workload balancing
758
An FPGA-based on-line neural system in photon counting intensified imagers for space applications
759
An FPGA-based open platform for ultrasound biomicroscopy
760
An FPGA-Based Optical IOH Architecture for Embedded System
761
An FPGA-Based Optical Transmitter Design Using Real-Time DSP for Advanced Signal Formats and Electronic Predistortion
762
An FPGA-based Optical Transmitter Using Real-Time DSP for Implementation of Advanced Signal Formats and Signal Predisortion
763
An FPGA-based Othello endgame solver
764
An FPGA-based Parallel Hardware Architecture for Real-Time Face Detection Using a Face Certainty Map
765
An FPGA-based parallel processor for Black-Scholes option pricing using finite differences schemes
766
An FPGA-based parallel sorting architecture for the Burrows Wheeler transform
767
An FPGA-based parameterised and scalable optimal solutions for pairwise biological sequence analysis
768
An FPGA-based pattern classifier using data compression
769
An FPGA-based pedagogical microprocessor for introductory computer engineering courses
770
An FPGA-based performance comparison of the 64-bit block ciphers
771
An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists
772
An FPGA-based physical layer implementation for vehicle-to-vehicle (V2V) communication
773
An FPGA-Based Plant-on-Chip Platform for Cyber-Physical System Analysis
774
An FPGA-based point pattern matching processor with application to fingerprint matching
775
An FPGA-based point target detection system using morphological clutter elimination
776
An FPGA-based probability-aware fault simulator
777
An FPGA-based processor for shogi mating problems
778
An FPGA-based prototyping method for verification, characterization and optimization of LDPC error correction systems
779
An FPGA-Based Quench Detection and Continuous Logging System for Testing Superconducting Magnets
780
An FPGA-Based Quench Detection and Protection System for Superconducting Accelerator Magnets
781
An FPGA-based Random Functional Verification Method for Cache
782
An FPGA-based rapid prototyping platform for variable-speed drives
783
An FPGA-based readout module for the DAQ subsystem of the DSSC detector at the European XFEL
784
An FPGA-based Real-time Background Identification Circuit for 1080p Video
785
An FPGA-Based Real-Time Hardware Accelerator for Orientation Calculation Part in SIFT
786
An FPGA-based real-time HIL test bench for full-bridge modular multilevel STATCOM controller
787
An FPGA-based real-time nonuniformity correction system for Infrared Focal Plane Arrays
788
An FPGA-based real-time simulator for HIL testing of modular multilevel converter controller
789
An FPGA-based real-time simultaneous localization and mapping system
790
An FPGA-based re-configurable 24-bit 96kHz sigma-delta audio DAC
791
An FPGA-based re-configurable functional tester for memory chips
792
An FPGA-Based Reconfigurable Mesh Many-Core
793
An FPGA-Based Region-Growing Video Segmentation System with Boundary-Scan-Only LSI Architecture
794
An FPGA-Based Robotics Platform for Educational and Research Applications
795
An FPGA-based scalable platform for high-speed malware collection in large IP networks
796
An FPGA-based sigma-delta audio DAC
797
An FPGA-based signal processing system for a 77 GHz MEMS tri-mode automotive radar
798
An FPGA-Based Simulator for High Path Count Rayleigh and Rician Fading
799
An FPGA-based single-phase interleaved boost-type PFC converter employing GaN HEMT devices
800
An FPGA-Based Singular Value Decomposition Processor
801
An FPGA-based Smart Camera for Gesture Analysis for Healthcare Applications
802
An FPGA-based soft multiprocessor system for IPv4 packet forwarding
803
An FPGA-Based Software Defined Radio Platform for the 2.4GHz ISM Band
804
An FPGA-based solution for testing legacy video displays
805
An FPGA-based Space-time coded telemetry receiver
806
An FPGA-based specific processor for Blokus Duo
807
An FPGA-based spectral anomaly detection system
808
An FPGA-based Spur-reduced numerically controlled oscillator
809
An FPGA-based stereoscopic camera - electronic design tools and techniques
810
An FPGA-based stream processor for embedded real-time vision with Convolutional Networks
811
An FPGA-based Sudoku Solver based on Simulated Annealing methods
812
An FPGA-Based System on Chip for the Measurement of QCM Sensors Resolution
813
An FPGA-based systolic array to accelerate the BWA-MEM genomic mapping algorithm
814
An FPGA-Based TDC for Free Space Quantum Key Distribution
815
An FPGA-based technique for linearizing RF power amplifiers
816
An FPGA-based test platform for analyzing data retention time distribution of DRAMs
817
An FPGA-based text search engine for approximate regular expression matching
818
An FPGA-Based Tightly Coupled Accelerator for Data-Intensive Applications
819
An FPGA-based time-domain frequency shifter with application to LTE and LTE-A systems
820
An FPGA-Based Transient Error Simulator for Resilient Circuit and System Design and Evaluation
821
An FPGA-based Transverse Multibunch Feedback System for Diamond Light Source
822
An FPGA-based trigger for the search of μ+ → e+7 decay in the MEG experiment
823
An FPGA-based trigger for the search of μ+ → e+γ decay in the MEG experiment
824
An FPGA-based ultrasound imaging system using capacitive micromachined ultrasonic transducers
825
An FPGA-based vehicle speed measurement system using an uncalibrated camera
826
An FPGA-Based Verification Framework for Real-Time Vision Systems
827
An FPGA-based video compressor for H.263 compatible bitstreams
828
An FPGA-Based Vision Prosthesis Prototype: Implementing an Efficient Multiplexing Method for Addressing Electrodes
829
An FPGA-based VME slave module for industrial control system
830
An FPGA-based voice signal preprocessor for the real-time cross-correlation
831
An FPGA-based wavelet transforms coprocessor
832
An FPGA-Based Web Server for High Performance Biological Sequence Alignment
833
An FPGA-based wideband PLL without significant quantization noise
834
An FPGA-based wireless network capstone project
835
An FPGA-based, 12-channel TDC and digital signal processing module for the RatCAP scanner
836
An FPGA-based, multi-model simulation method for biochemical systems
837
An FPGA-cluster-accelerated match engine for content-based image retrieval
838
An FPGA-Emulation-Based Platform for Characterization of Digital Baseband Communication Systems
839
An FPGA-enhanced genetic algorithm for mitigation of a flawed array radiation
840
An FPGA-Integrated Time-to-Digital Converter Based on Two-Stage Pulse Shrinking
841
An FPGA-optimized architecture of horn and schunck optical flow algorithm for real-time applications
842
An FPGA-specific algorithm for direct generation of multi-variate Gaussian random numbers
843
An FPGA-specific approach to floating-point accumulation and sum-of-products
844
An FPN-free 2/3" 1.3M-pixel CCD Image Sensor For HDTV Camera System
845
An FP-split method for fast association rules mining
846
An FPT algorithm with a modularized structure for computing 2-D cyclic convolutions
847
An FPT algorithm with a modularized structure for computing two-dimensional discrete Fourier transforms
848
An FPTAS for #Knapsack and Related Counting Problems
849
An FPTAS for batch scheduling with deterioration effect
850
An FPTAS for managing playout stalls for multiple video streams in cellular networks
851
An FRAM-Based Nonvolatile Logic MCU SoC Exhibiting 100% Digital State Retention at {\\rm VDD}= 0 V Achieving Zero Leakage With