بر اساس عنوان

1
Architectural Design of Multiplicative type-II Fuzzy Cellular Neural Network in CMOS Technology
2
Architectural design of on-demand video delivery systems: the spatio-temporal storage allocation problem
3
Architectural design of the Health Watch system with an integrated aspect-oriented modeling approach
4
Architectural Design of the Online Auction System with AOSAD
5
Architectural design of the university´s management system of mobile library service
6
Architectural Design of Unified Multiplex Communications for One-Time Use of IP Addresses
7
Architectural design on natural ventilation
8
Architectural design patterns for adaptable ubiquitous social networking systems
9
Architectural Design Patterns for Flight Software
10
Architectural design patterns for logic control of manufacturing systems: The generalized device
11
Architectural design processes for IJM
12
Architectural design proposals selection based on fuzzy analytic hierarchy process
13
Architectural design recovery using data mining techniques
14
Architectural design simulation and silicon implementation of a very high fidelity decimation filter for sigma-delta data converters
15
Architectural design styles in the VLSI implementation of real discrete Fourier transform
16
Architectural design support for composition and superimposition
17
Architectural design tool for low area band matrix LU factorization
18
Architectural Designs from Mobile Cloud Computing to Ubiquitous Cloud Computing - Survey
19
Architectural developments in online computer systems for power stations
20
Architectural digital images. Quality and emotional evaluation based on the visualization environment
21
Architectural directions for opening IBM networks: the case of OSI
22
Architectural distortion detection from mammograms using support vector machine
23
Architectural education: evaluation and assessment
24
Architectural education: meeting the challenges
25
Architectural effects on dual instruction issue with interlock collapsing ALUs
26
Architectural Effects on Requirements Decisions: An Exploratory Study
27
Architectural Efficiency Measures: An Overview of Three Studies
28
Architectural element matching using concept analysis
29
Architectural Elements of Integrated Micro-Sensors for Distributed Sensor Networks
30
Architectural energy optimization by bus splitting
31
Architectural Enhancement and System Software Support for Program Code Integrity Monitoring in Application-Specific Instruction-Set Processors
32
Architectural enhancements for fast subword permutations with repetitions in cryptographic applications
33
Architectural enhancements for improving TCP performance over FSO networks
34
Architectural enhancements for network congestion control applications
35
Architectural envelopes that interact with their environment
36
Architectural error prediction using probabilistic error masking matrices
37
Architectural evaluation of 3D stacked RRAM caches
38
Architectural evaluation of flexible digital signal processing for wireless receivers
39
Architectural Evolution of Integrated M-Phase High-Q Bandpass Filters
40
Architectural evolution of legacy systems
41
Architectural exploration and optimization for counter based hardware address generation
42
Architectural exploration and optimization of local memory in embedded systems
43
Architectural exploration for analog system synthesis
44
Architectural exploration for datapaths with memory hierarchy
45
Architectural exploration for on-chip, online learning in spiking neural networks
46
Architectural exploration in biomedical hardware design using a novel behavioral synthesis methodology
47
Architectural exploration of 3D FPGAs towards a better balance between area and delay
48
Architectural exploration of a fine-grained 3D cache for high performance in a manycore context
49
Architectural Exploration of Chip-Scale Photonic Interconnection Network Designs Using Physical-Layer Analysis
50
Architectural exploration of filtering stages in the transmit path of a GSM audio codec
51
Architectural exploration of Forward 4×4 Hadamard Transform applied to H.264/AVC video compression standard
52
Architectural exploration of high performance Montgomery modular multipliers
53
Architectural Exploration of Large-Scale Hierarchical Chip Multiprocessors
54
Architectural exploration of optical and electrical interconnects in MPSoC
55
Architectural Exploration of Per-Core DVFS for Energy-Constrained On-Chip Networks
56
Architectural exploration tasks for on-chip embedded systems
57
Architectural Exploration to Enable Sufficient MTJ Device Write Margin for STT-RAM Based Cache
58
Architectural exploration using behavioral synthesis
59
Architectural Exploration Using Verilog-based Power Estimation: A Case Study Of The Idct
60
Architectural extensions for elliptic curve cryptography over GF(2m) on 8-bit microprocessors
61
Architectural extensions to support effcient communication using message prediction
62
Architectural features and urban propagation
63
Architectural features of the i860-microprocessor RISC core and on-chip caches
64
Architectural figure - a reuse pattern for analysis and transformation of ODP based-systems
65
Architectural framework for a system-of-systems
66
Architectural Framework for Application Level QoS Adaptation in Next Generation Networks
67
Architectural framework for developing concurrent applications
68
Architectural framework for diffused cloud
69
Architectural framework for implementing visual surveillance as a service
70
Architectural framework for large-scale multicast in mobile ad hoc networks
71
Architectural framework for optical frequency division multiplexing systems based on regular space-frequency interconnections
72
Architectural framework for standardizing multimedia services on fiber-coax
73
Architectural framework for supporting operating system survivability
74
Architectural framework for the integration of distributed resources
75
Architectural Framework for Wireless Mobile Ad hoc Networks (WMANETs)
76
Architectural framework modeling in telecommunication domain
77
Architectural framework of mobile based web miner
78
Architectural framework proposed of behavioural classroom simulation based second life environment
79
Architectural frameworks for developing national health information systems in low and middle income countries
80
Architectural frameworks for MPP systems on a chip
81
Architectural Frameworks for Security and Reliability of MPSoCs
82
Architectural from the perspective of oral history
83
Architectural hardware design of modulator and demodulator for galvanic coupling intra-body communication
84
Architectural Heritage semantic data managing and sharing in GIS
85
Architectural Hoisting
86
Architectural illustration: the advancement of light, shade and shadows knowledge with 3D digital technology
87
Architectural impact of new services in a mobile network
88
Architectural impact of secure socket layer on Internet servers
89
Architectural impact of secure socket layer on Internet servers
90
Architectural impact of secure socket layer on Internet servers: A retrospect
91
Architectural impact of stateful networking applications
92
Architectural impact on performance of a multilevel database system
93
Architectural impacts of emerging transistors
94
Architectural implementation of high speed optical flow computation based on Lucas-Kanade algorithm
95
Architectural Implications and Process Development of 3-D VLSI Z -Axis Interconnects Using Through Silicon Vias
96
Architectural implications for context adaptive smart spaces
97
Architectural Implications for SIMD Processors in the Wireless Communication Domain
98
Architectural implications for spatial object association algorithms
99
Architectural implications of a family of irregular applications
100
Architectural implications of core grooming in a 46-node USA optical network
101
Architectural Implications of Nanoscale-Integrated Sensing and Computing
102
Architectural implications of smart city business models: an evolutionary perspective
103
Architectural implications of the NAS MG and FT parallel benchmarks
104
Architectural improvements and FPGA implementation of a multimodel neuroprocessor
105
Architectural innovation competence based on modularization
106
Architectural innovations for high performance in PLDs
107
Architectural integration of grid connected photovoltaic systems for schools in Coslada
108
Architectural integration of RSA accelerator into MIPS processor
109
Architectural integration styles for large-scale enterprise software systems
110
Architectural interaction diagrams: AIDs for system modeling
111
Architectural issues for cross-organisational B2B interactions
112
Architectural issues for integrating tactical radio access networks in civilian infrastructure
113
Architectural issues for integration of sensing and acting modalities
114
Architectural issues for robust optical access
115
Architectural issues in adopting distributed shared memory for distributed object management systems
116
Architectural issues in base-station frequency synthesizers
117
Architectural issues in designing heterogeneous parallel systems with passive star-coupled optical interconnection
118
Architectural Issues in Homogeneous NoC-Based MPSoC
119
Architectural issues in Java runtime systems
120
Architectural issues in mobile augmented reality systems: a prototyping case study
121
Architectural Issues in Opening Up the Advantages of Open Source in Product Development Companies
122
Architectural Issues in Real-Time Intelligent User Interface Technology
123
Architectural issues in solid modelers
124
Architectural Issues of JMS Compliant Group Communication
125
Architectural issues of legacy copper network
126
Architectural Issues Of Photonic Networks
127
Architectural issues to support multicasting over wireless and mobile networks
128
Architectural Knowledge in Product Line Engineering: An Industrial Case Stu
129
Architectural Knowledge Management in Global Software Development: A Review
130
Architectural Knowledge Management Practices in Agile Global Software Development
131
Architectural Knowlege Management Strategies: Approaches in Research and Industry
132
Architectural layout planning using genetic algorithms
133
Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking
134
Architectural Leakage-Aware Management of Partitioned Scratchpad Memories
135
Architectural level hierarchical power estimation of control units
136
Architectural level hypothesis testing through reverse engineering of object-oriented software
137
Architectural level risk assessment tool based on UML specifications
138
Architectural level support for dynamic reconfiguration and fault tolerance in component-based distributed software
139
Architectural level test generation for microprocessors
140
Architectural leverage: putting platforms in context
141
Architectural limits on optical highway interconnected parallel processing
142
Architectural low-power design using transaction-based system modeling and simulation
143
Architectural Maintenance Using a Data Warehouse System for Availability Analysis
144
Architectural measures against radiation effects in multicore SoC for safety critical applications
145
Architectural mechanisms for dynamic changes of behavior selection strategies in behavior-based systems
146
Architectural Mechanisms for Explicit Communication in Shared Memory Multiprocessors
147
Architectural Mechanisms To Support Sparse Vector Processing
148
Architectural Misalignment: An Experience Report
149
Architectural Mismatch Detection between Component and Aspect Based on Finite Automata
150
Architectural Mismatch in Service-Oriented Architectures
151
Architectural Mismatch or Why it´s hard to build systems out of existing parts
152
Architectural mismatch: why reuse is so hard
153
Architectural Mismatch: Why Reuse Is Still So Hard
154
Architectural mitigation for high performance energy measurement
155
Architectural Model and Planification Algorithm for the Self-Management of Elastic Cloud Applications
156
Architectural Model and Resource Estimation for Distributed Hardware Implementation of Discrete Signal Transforms
157
Architectural Model and Security Mechanisms for Cloud Federations
158
Architectural model and service scenario of dynamic service overlay network (DSON)
159
Architectural model for a high performance content management system
160
Architectural model for next generation content management system
161
Architectural model for SONET end-to-end management with object-oriented approach
162
Architectural Model for VR and AR Applications in the Cloud
163
Architectural model for Wireless Peer-to-Peer (WP2P) file sharing for ubiquitous mobile devices
164
Architectural model of enterprise multiservice network maintaining mobility
165
Architectural model of enterprise multiservice network maintaining mobility
166
Architectural modeling in industry-an experience report
167
Architectural modeling of metamemory judgment in case-based reasoning systems
168
Architectural Modeling to Verify Security and Nonfunctional Behavior
169
Architectural modelling and information interfacing: learning from three case studies
170
Architectural modelling to understand system evolution
171
Architectural models and design methodologies for general-purpose highly-parallel computers
172
Architectural models for global automation systems
173
Architectural models for intelligent machines
174
Architectural models in urban landscapes: Synthesis of markers and virtual structures
175
Architectural Models of Ambient-PRISMA in Channel Ambient Calculus
176
Architectural Modifications to Enhance the Floating-Point Performance of FPGAs
177
Architectural Modifications to Improve Floating-Point Unit Efficiency in FPGAs
178
Architectural Naming, a Secret of Agile Thinking
179
Architectural optimization for low-power nonpipelined asynchronous systems
180
Architectural optimization of coherent ultra-dense WDM based optical access networks
181
Architectural optimization of decimation filter using bitstream operation in GSM audio codec
182
Architectural Optimization of Decomposition Algorithms for Wireless Communication Systems
183
Architectural optimization of extensible ground-based GNSS augmentation system
184
Architectural Optimizations & Hardware Implementations of WLANs Encryption Standard
185
Architectural optimizations for a floating point multiply-accumulate unit in a graphics pipeline
186
Architectural Optimizations for Low-Power K -Best MIMO Decoders
187
Architectural optimizations for software-based MPEG4 video encoder
188
Architectural Optimizations for Text to Speech Synthesis in Embedded Systems
189
Architectural optimizations to advanced distributed simulation
190
Architectural options and challenges for next generation optical access
191
Architectural Options for Cloud Migration
192
Architectural options for the WLAN integration at the UMTS radio access level
193
Architectural Organizational Patterns
194
Architectural orthophoto plan for pathological characterization of the Medieval Wall of Avila
195
Architectural overview of HaL systems
196
Architectural overview of the computational intelligence testing tool
197
Architectural overview of the SPEAKeasy system
198
Architectural Partitioning for System Level Design
199
Architectural partitioning for system level synthesis of integrated circuits
200
Architectural partitioning of control memory for application specific programmable processors
201
Architectural pattern for the definition of eLearning ecosystems based on Open Source developments
202
Architectural Patterns and Auto-Fusion Process for Automated Multisensor Fusion in SOA System-of-Systems
203
Architectural patterns for problem frames
204
Architectural patterns for service-based mobile applications
205
Architectural performance analysis of linear-lightwave multifibre WDM networks in grid topology
206
Architectural performance verification: PowerPC processors
207
Architectural perspective of parallelizing association rule mining
208
Architectural perspective on collaborative multipath TCP in mobile environment
209
Architectural perspectives of future wireless base stations based on the IBM PowerEN™ processor
210
Architectural Petri nets: basic concepts, methodology and examples of applications
211
Architectural plan for constructing fault tolerable workflow engines based on grid service
212
Architectural power analysis: The dual bit type method
213
Architectural Power Estimation Technique for IP-Based System-on-Chip
214
Architectural power macromodeling technique for DSP architectures
215
Architectural power management for high leakage technologies
216
Architectural power models for sram and cam structures based on hybrid analytical/empirical techniques
217
Architectural power optimization by bus splitting
218
Architectural presentation of isotopic levels of relief of images
219
Architectural principles and elements of in-network management
220
Architectural principles for safety-critical real-time applications
221
Architectural Principles for Secure Streaming & Secure Adaptation in the Developing Scalable Video Coding (SVC) Standard
222
Architectural principles for the U.S. Army´s simulation and modeling for acquisition, requirements and training (SMART) initiative
223
Architectural principles of optical regional and metropolitan access networks
224
Architectural Principles of the "Streamonas" Data Stream Management System and Performance Evaluation Based on the Linear Road Benchmark
225
Architectural probing: a new paradigm for enabling communication refinement in SOC design
226
Architectural properties of CSCWD system based on multi C2 D2-agent
227
Architectural proposal for a mobile telepresence robot, REGIMTEL
228
Architectural Proposal for a Robotized Intelligent humanoid, IZiman
229
Architectural propositions for enhancement of learning spaces within 3D virtual learning environments
230
Architectural prototyping: an approach for grounding architectural design and learning
231
Architectural QoS Predictions in Model-Driven Development of Component-Based Software
232
Architectural Reconstruction of 3D Building Objects through Semantic Knowledge Management
233
Architectural redesign of a distributed execution environment
234
Architectural re-engineering of Janus using object modeling and rapid prototyping
235
Architectural Refactoring: A Task-Centric View on Software Evolution
236
Architectural relationships between polarization-encoded optical shadow-casting and spatial filtering using frequency modulation
237
Architectural reliability estimation using design diversity
238
Architectural reliability of split-protocol
239
Architectural Reliability: Lifetime Reliability Characterization and Management ofMany-Core Processors
240
Architectural repair of open source software
241
Architectural representation of embedded systems
242
Architectural Requirements and Scalability of the NAS Parallel Benchmarks
243
Architectural requirements as basis to quality of software engineering environments
244
Architectural requirements for energy efficient execution of graph analytics applications
245
Architectural requirements for integrating group decision support systems into the daily managerial experience
246
Architectural requirements for multimedia image compression, and a solution based on VLSI hardware accelerator
247
Architectural requirements for regional library & information service system: An approach to data integration in cloud
248
Architectural requirements for threshold logic gates based on resonant tunneling devices
249
Architectural requirements of image understanding with respect to parallel processing
250
Architectural Requirements Of Parallel Scientific Applications With Explicit Communication
251
Architectural resource requirements of contemporary benchmarks: a wish list
252
Architectural retiming: pipelining latency-constrained circuits
253
Architectural Risk Analysis of Software Systems Based on Security Patterns
254
Architectural rule checking for high-level synthesis
255
Architectural run-time models for operator-in-the-loop adaptation of cloud applications
256
Architectural Runtime Models for Privacy Checks of Cloud Applications
257
Architectural Scale
258
Architectural selection of A/D converters
259
Architectural Semantics for Practical Transactional Memory
260
Architectural semantics of AADL using Event-B
261
Architectural Significant Package (ASP): fundamentals of object-oriented architecture modeling for real-time embedded applications
262
Architectural simulation for a programmable DSP chip set
263
Architectural simulation in the context of behavioral synthesis
264
Architectural simulation system for M.f.a.s.t
265
Architectural simulations of a fast, source-synchronous ring-based Network-on-Chip design
266
Architectural Simulators Considered Harmful
267
Architectural singularity analysis and design optimization of a parallel mechanism with a suspended platform
268
Architectural software configuration management in Molhado
269
Architectural software support for processing clusters
270
Architectural solution for improving performance of Video-on-Demand systems
271
Architectural solution for second-order intermodulation intercept point improvement in direct down-conversion receivers
272
Architectural solution for virtualized processing of big earth data
273
Architectural Solution Integration to contain ICT supply chain threats
274
Architectural solution to the air force and navy´s joint missiion planning system (jmps)
275
Architectural solutions for enhancing the real-time behavior of distributed embedded systems
276
Architectural Solutions for Mobile RFID Services for the Internet of Things
277
Architectural solutions for open access in next-generation passive optical networks (NG-PONs)
278
Architectural space information scale: A new way of understanding architectural space
279
Architectural space planning using Genetic Algorithms
280
Architectural Specialization for Inter-Iteration Loop Dependence Patterns
281
Architectural specification and analysis with XCD
282
Architectural specification for infusion pumps and realization towards safety technological trends
283
Architectural strategies for an application-specific synchronous multiprocessor environment
284
Architectural strategies for low-power VLSI turbo decoders
285
Architectural studies of games engines — The quake series
286
Architectural study for an integrated fixed and floating-point VLSI-ASIC processor
287
Architectural Study of HOG Feature Extraction Processor for Real-Time Object Detection
288
Architectural study of reconfigurable photonic Networks-on-Chip for multi-core processors
289
Architectural style-based modeling and simulation of complex software systems
290
Architectural Styles for Adaptive Systems: A Tutorial
291
Architectural styles for runtime software adaptation
292
Architectural styles, design patterns, and objects
293
Architectural support for accelerating congestion control applications in network processors
294
Architectural support for arithmetic in optimal extension fields
295
Architectural Support for Automated Software Attack Detection, Recovery, and Prevention
296
Architectural support for automatic service composition
297
Architectural support for block transfers in a shared-memory multiprocessor
298
Architectural support for compiler-synthesized dynamic branch prediction strategies: Rationale and initial results
299
Architectural support for conditional antidependency elimination
300
Architectural support for cooperative multiuser interfaces
301
Architectural support for data-intensive applications
302
Architectural support for debugging and monitoring real-time software
303
Architectural support for designing fault-tolerant open distributed systems
304
Architectural support for detection of sleepy eye behavior
305
Architectural Support for DevOps in a Neo-Metropolis BDaaS Platform
306
Architectural Support for Dynamic Data Distribution and Dynamic
307
Architectural support for dynamic memory management
308
Architectural support for dynamic reconfiguration of distributed workflow applications
309
Architectural support for dynamic reconfiguration of large scale distributed applications
310
Architectural Support for Effcient Execution of Reusable Software Components
311
Architectural support for efficient multicasting in irregular networks
312
Architectural support for enhanced SMT job scheduling
313
Architectural Support for Exploiting Fine Grain Parallelism
314
Architectural Support for Fair Reader-Writer Locking
315
Architectural support for goal management in flat concurrent Prolog
316
Architectural support for greater predictability in real-time systems
317
Architectural Support for Handling Jitterin Shared Memory Based Parallel Applications
318
Architectural support for high speed protection of memory integrity and confidentiality in multiprocessor systems
319
Architectural support for high-performance distributed computing
320
Architectural support for Internet evolution and innovation
321
Architectural support for inter-stream communication in a MSIMD system
322
Architectural support for low overhead detection of memory violations
323
Architectural Support for Mitigating Row Hammering in DRAM Memories
324
Architectural support for mobile objects in large scale distributed systems
325
Architectural support for multipoint digital video communications
326
Architectural Support for Network Applications on Simultaneous MultiThreading Processors
327
Architectural support for non-expert deployment of remote laboratories
328
Architectural support for parallel reductions in scalable shared-memory multiprocessors
329
Architectural support for performance tuning: a case study on the SPARCcenter 2000
330
Architectural support for persistent object systems
331
Architectural support for reducing communication overhead in multiprocessor interconnection networks
332
Architectural Support for Reducing Parallel Processing Overhead in an Embedded Multiprocessor
333
Architectural support for register allocation in the presence of aliasing
334
Architectural Support for Run-Time Validation of Control Flow Transfer
335
Architectural Support for Run-Time Validation of Program Data Properties
336
Architectural support for runtime verification on ccNUMA multiprocessors
337
Architectural support for safe software execution on embedded processors
338
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
339
Architectural support for securing application data in embedded systems
340
Architectural Support for Software Transactional Memory
341
Architectural support for synchronization of threads accessing variable-sized units of virtual memory
342
Architectural support for synchronization-free deterministic parallel programming
343
Architectural Support for System Protection and Database Security
344
Architectural support for system software on large-scale clusters
345
Architectural support for the management of tightly-coupled fine-grain goals in Flat Concurrent Prolog
346
Architectural support for the orchestration of fine-grained multiprocessing for portable streaming applications
347
Architectural Support for the Stream Execution Model on General-Purpose Processors
348
Architectural Support For Translation Table Management In Large Address Space Machines
349
Architectural support for uniprocessor and multiprocessor active memory systems
350
Architectural support of fine-grained secure computing
351
Architectural Support on Object-Oriented Programming in a JAVA Processor
352
Architectural support predicting method for CMP scheduling
353
Architectural synthesis for digital neural networks
354
Architectural synthesis for DSP silicon compilers
355
Architectural Synthesis Frameworks on Distributed Register-File Microarchitecture Family
356
Architectural synthesis Integrated with global placement for multi-cycle communication
357
Architectural synthesis of an image processing algorithm using IRIS
358
Architectural synthesis of computational pipelines with decoupled memory access
359
Architectural synthesis of digital filters for ASIC implementation
360
Architectural synthesis of digital signal processing applications dedicated to submicron technologies
361
Architectural Synthesis of DSP Applications with Dynamically Reconfigurable Functional Units
362
Architectural synthesis of DSP circuits under simultaneous error and time constraints
363
Architectural synthesis of finite impulse response digital filters
364
Architectural synthesis of high-level analogue VHDL-AMS descriptions using netlist extraction from parse trees
365
Architectural synthesis of networks on chip
366
Architectural Synthesis of Performance--Driven Multipliers with Accumulator Interleaving
367
Architectural synthesis of timed asynchronous systems
368
Architectural Synthesis with Control Data Flow Extraction toward an Asynchronous CAD Tool
369
Architectural synthesis with possibilistic programming
370
Architectural synthesis: integrating multiple architectural perspectives
371
Architectural system modeling for correct-by-construction RTL design
372
Architectural task allocation in distributed environment: A traceability perspective
373
Architectural Technical Debt Identification Based on Architecture Decisions and Change Scenarios
374
Architectural techniques for accelerating subword permutations with repetitions
375
Architectural techniques for eliminating critical feedback paths
376
Architectural techniques for the description and validation of distributed real-time systems
377
Architectural Test Coverage for Component-Based Integration Testing
378
Architectural Thermal Energy Harvesting Opportunities for Sustainable Computing
379
Architectural timing verification and test for super scalar processors
380
Architectural topologies for NoC datapath polymorphic processors
381
Architectural Trace-Based Functional Coverage for Multiprocessor Verification
382
Architectural tradeoffs at the object level
383
Architectural tradeoffs for a meaning-preserving program restructuring tool
384
Architectural Trade-Offs for Fault Tolerant Multi-Core Systems
385
Architectural tradeoffs for reconfigurable dense wavelength-division multiplexing systems
386
Architectural trade-offs for SiGe BiCMOS direct conversion receiver front-ends for IEEE802.11a
387
Architectural tradeoffs for survivor sequence memory management in Viterbi decoders
388
Architectural trade-offs for video transport networks
389
Architectural tradeoffs in field-programmable-device-based computing systems
390
Architectural tradeoffs in synthesis of pipelined controls
391
Architectural Tradeoffs in the Design of Barrel Shifters for Reconfigurable Computing
392
Architectural trade-offs in the design of low power FIR filtering cores
393
Architectural trades for an advanced geostationary atmospheric sounding instrument
394
Architectural translucency in service-oriented architectures
395
Architectural Trends For Shared-memory Multiprocessors
396
Architectural trends in GHz speed DACs
397
Architectural trends in military satellite communications systems
398
Architectural tuning of color chromaticity by controlled nonradiative resonance energy transfer in CdTe nanocrystal solids
399
Architectural verification of processors using symbolic instruction graphs
400
Architectural VHDL design and test synthesis
401
Architectural view driven model transformations for supporting the lifecycle of parallel applications
402
Architectural View in Software Development Life-Cycle Practices
403
Architectural Viewpoints for Global Software Development
404
Architectural views through collapsing strategies
405
Architectural vs. delivered performance of the IBM RS/6000 and the Astronautics ZS-1
406
Architectural vulnerability aware checkpoint placement in a multicore processor
407
Architectural Vulnerability Factor (or, does a soft error matter?)
408
Architectural Vulnerability Factor Estimation with Backwards Analysis
409
Architectural walkthroughs using portal textures
410
Architectural yield analysis of random defects in wafer scale integration
411
Architectural yield optimization for WSI
412
Architectural, Service, and Performance Modeling for an IMS-MBMS-Based Application
413
Architectural, system level and protocol level techniques for power optimization for networked embedded systems
414
Architectural, Technological and Methodological Aspects Involved in Design and Engineering a Service-Oriented Geographic Intelligence
415
Architectural-Based Validation of Fault-Tolerant Software
416
Architectural-enhanced intrusion detection and memory authentication schemes in embedded systems
417
Architectural-level error-tolerant techniques for low supply voltage cache operation
418
Architectural-level fault simulation using symbolic data
419
Architectural-level fault tolerant computation in nanoelectronic processors
420
Architectural-Level Power Optimization of Microcontroller Cores in Embedded Systems
421
Architectural-level prediction of interconnect wirelength and fanout
422
Architectural-level risk analysis using UML
423
Architectural-level synthesis of digital microfluidics-based biochips
424
Architecturally efficient FFT pruning algorithm
425
Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems
426
Architecturally reconfigurable development of mobile games
427
Architecturally Significant Requirements, Reference Architecture, and Metamodel for Knowledge Management in Information Technology Services
428
Architecturally-efficient computation of shortest paths for a mobile robot
429
Architecturally-Enforced InfoSec in a General-Purpose Self-Configurable System
430
Architecture - oriented approach for detecting fraud in the online auction
431
Architecture & system design of Authentication, Authorization, & Accounting services
432
Architecture [Session 2 B]
433
Architecture Adaptation Based on Belief Inaccuracy Estimation
434
Architecture alternative for wireless data services: interworking with voiceband modem
435
Architecture alternatives for integrating Cellular IP and Mobile IP
436
Architecture alternatives for PCS-to-Internet protocol interworking
437
Architecture alternatives for wireless data services
438
Architecture analysis and design language & harmony system engineering process
439
Architecture analysis and design language & harmony system engineering process
440
Architecture analysis and design of swarm robot systems based on the multi-task’s
441
Architecture Analysis and Implementation of 3D Theatre Display System Based on Node.js
442
Architecture Analysis and Implementation of a Web-Based Fingerprint Management System
443
Architecture analysis and optimization of reconfigurable, complex systems
444
Architecture analysis for a communications signal processor
445
Architecture Analysis for Low-Delay Video Coding
446
Architecture analysis of MLP by geometrical interpretation
447
Architecture analysis tools to support evolution of large industrial systems
448
Architecture and Abstractions for Environment and Traffic Aware System-Level Coordination of Wireless Networks: The Downlink Case
449
Architecture and Abstractions for Environment and Traffic-Aware System-Level Coordination of Wireless Networks
450
Architecture and Agility: Married, Divorced, or Just Good Friends?
451
Architecture and Algorithm for a Laboratory Vehicle Collision Avoidance System
452
Architecture and Algorithm for a Stochastic Soft-output MIMO Detector
453
Architecture and algorithm for high performance fault-tolerant replication of sensitive military and homeland security C/sup 3/I database messages
454
Architecture and algorithm for high precision image rejection and spurious rejection mixers using digital compensation
455
Architecture and algorithm for parallel execution of a join operation
456
Architecture and algorithm for ultra-high precision image rejection mixer using digital compensation
457
Architecture And Algorithm For Visual Information Processing
458
Architecture and algorithm of intelligent vehicle navigation system based on MEMS
459
Architecture and algorithms for an IEEE 802.11-based multi-channel wireless mesh network
460
Architecture and Algorithms for Generating General-Purpose Modulation Signals
461
Architecture and algorithms for new cesium beam frequency standard electronics
462
Architecture and Algorithms for Syntetizable Neural Networks with On-Chip Learning
463
Architecture and algorithms for tracking football players with multiple cameras
464
Architecture and algorithms for tracking football players with multiple cameras
465
Architecture and algorithms for virtual routers as a service
466
Architecture and analysis of a satellite downstream boost for xDSL networks
467
Architecture and analysis of a self-assembled 3D array of carbon nanotubes and molecular memories
468
Architecture and analysis of color structure and scalable color descriptor for real-time video indexing and retrieval
469
Architecture and Analysis of Split Isolation Radio Frequency Electronics
470
Architecture and Application Abstractions for Multi-Agent Collaboration Projects
471
Architecture and Application Framework for Digital Hospital
472
Architecture and application of 3D WebGIS based on Skyline and ArcGIS
473
Architecture and application of a commercially available speech recognition board
474
Architecture and application of a dynamically reconfigurable hardware array for future mobile communication systems
475
Architecture and Application of PLATO, A Reconfigurable Active Network Platform
476
Architecture and application partitioning for reconfigurable system design
477
Architecture and Application: The Performance of the NEC SX-4 on the NCAR Benchmark Suite
478
Architecture and applications for a distributed embedded firewall
479
Architecture and Applications for an All-FPGA Parallel Computer
480
Architecture and applications of a 100-ns CMOS VLSI digital signal processor
481
Architecture and applications of a 12-bit CMOS microprocessor
482
Architecture and applications of a second-generation digital signal processor
483
Architecture and applications of a versatile small-cell, multi-service cloud radio access network using radio-over-fiber technologies
484
Architecture and applications of high performance adaptive antenna equipment
485
Architecture and applications of Language-Centered Intelligence for unmanned underwater vehicles
486
Architecture and applications of the Connection Machine
487
Architecture and applications of the HiPAR video signal processor
488
Architecture and Applications of Virtual Coaches
489
Architecture and Applications of wireless Smart Cameras (Networks)
490
Architecture and Approach for Obtaining Spectrum Availability Information
491
Architecture And Automatic Task Planning For Integrated Sensor-based Robots
492
Architecture and Behavioral Model for Future Cognitive Heterogeneous Networks
493
Architecture and behaviour analysis for engineering Service Modes
494
Architecture and bus-arbitration schemes for HDTV SoC decoder
495
Architecture and bus-arbitration schemes for MPEG-2 video decoder
496
Architecture and business model of open heterogeneous mobile network
497
Architecture and CAD for FPGA Clock Networks
498
Architecture and CAD for FPGAs
499
Architecture and capabilities of a data warehouse for ATM research
500
Architecture and capabilities of a data warehouse for ATM research
501
Architecture and challenges of maintaining a large-scale, context-aware Human Digital Memory
502
Architecture and characterization of a calibrator for PMUs operating in power distribution systems
503
Architecture and circuit design balance between integrated and photon counting mode for X-ray pixel array detector read-out electronics
504
Architecture and Circuit Design for Color X-Ray Pixel Array Detector Read-out Electronics
505
Architecture and circuit design for DSP-ASIC
506
Architecture and circuit design for photon counting coloured imaging using MATLAB
507
Architecture and circuit design of a 6-GOPS signal processor for QAM demodulator applications
508
Architecture and circuit design of parallel processing elements for de novo sequence assembly
509
Architecture and circuit engineering of precision differential amplifiers with increased common-mode rejection
510
Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS
511
Architecture and circuit techniques for a reconfigurable memory block
512
Architecture and Clock Programmable Baseband of an 800 MHz-6 GHz Software-Defined Wireless Receiver
513
Architecture and collaborations among agents in mobile educational game
514
Architecture and commissioning of the TCV distributed feedback control system
515
Architecture and communication among product development engineers
516
Architecture and Communication of an Electric Vehicle Virtual Power Plant
517
Architecture and communication protocols for cognitive radio network enabled hospital
518
Architecture and compilation for data bandwidth improvement in configurable embedded processors
519
Architecture and compiler co-optimization for high performance computing
520
Architecture and compiler enhancements for PA-RISC workstations
521
Architecture and Compiler Optimizations for Data Bandwidth Improvement in Configurable Processors
522
Architecture and components for capture and access applications
523
Architecture and concepts of the ARGuE Guard
524
Architecture and configuration of broadband access networks supporting multimedia applications
525
Architecture and configuration of electrified vehicles: A review
526
Architecture and Construction of a Hardware Sequential Encoder for Speech
527
Architecture and construction principles of wireless sensor networks
528
Architecture and Control Algorithms for Combating Partial Shading in Photovoltaic Systems
529
Architecture and control of a distributed signal processor
530
Architecture and control of a high energy density buffer for power pulsation decoupling in grid-interfaced applications
531
Architecture and control of an adaptive high capacity flat network
532
Architecture and control of fully-dispatchable microgrids
533
Architecture and control of PV modules with submodule integrated converters
534
Architecture and cooperation mechanism of MAS for information integration emergency-service oriented
535
Architecture and Data Management Challenges in GEOSS and IEOS
536
Architecture and dependability of large-scale internet services
537
Architecture and deployment issues in ATM LANs
538
Architecture and Design Analysis of a Digital Single-Event Transient/Upset Measurement Chip
539
Architecture and design automation for application-specific processors
540
Architecture and Design Criteria for Space-Based Surveillance Radar
541
Architecture and design flow for a debug event distribution interconnect
542
Architecture and Design Flow for a Highly Efficient Structured ASIC
543
Architecture and design intent in component & COTS based systems
544
Architecture and Design Intent: An Experience Report
545
Architecture and Design Methodology for Structured LDPC Decoder
546
Architecture and design methodology for synthesizable reconfigurable array targeting wireless system-on-chip applications
547
Architecture and Design Methodology of 32KByte Integrated Cache Memory
548
Architecture and design methodology of a 32-bit microprocessor
549
Architecture and design methodology of the RBF-DDA neural network
550
Architecture and design of a 40 gigabit per second ATM switch
551
Architecture and design of a 500-MHz gallium-arsenide processing element for a parallel supercomputer
552
Architecture and design of a high performance SRAM for SOC design
553
Architecture and design of a holonic visual interface
554
Architecture and design of a portable protocol tester
555
Architecture and design of a programmable 3D-integrated cellular processor array for image processing
556
Architecture and design of a pseudo two-port VLSI snoopy cache memory
557
Architecture and design of a real-time parallel processor
558
Architecture and Design of a Reliable Token-Ring Network
559
Architecture and design of a second-level cache chip with copy-back and 160 MB/s burst-transfer features
560
Architecture and design of a Talisman-compatible multimedia processor
561
Architecture and design of a very fast real time delay insensitive asynchronous morphological processor in GaAs
562
Architecture and design of an enhanced H.323 VoIP gateway
563
Architecture and design of an inductive contactless energy transfer system with two mobile loads for residential applications
564
Architecture and design of an open ATE to incubate the development of third-party instruments
565
Architecture and design of an open systems LAN/WAN gateway
566
Architecture and design of connectionless data service for a public ATM network
567
Architecture and Design of Distributed Decision Support System Based on Agent Grid
568
Architecture and design of education IPTV for E-learning in Rural Area
569
Architecture and Design of Efficient 3D Network-on-Chip (3D NoC) for Custom Multicore SoC
570
Architecture and design of GE1, an FCCM for Golomb ruler derivation
571
Architecture and Design of Multichannel Millimeter-Wave Wireless NoC
572
Architecture and design of NX-2700: a programmable single-chip HDTV all-format-decode-and-display processor
573
Architecture and design of optical channel protected ring networks
574
Architecture and design of storage and data management for the NASA Earth observing system Data and Information System (EOSDIS)
575
Architecture and design of the AGIPD detector for the European XFEL
576
Architecture and design of the aquarius instrument for RF and thermal stability
577
Architecture and Design of the MARS Hardware Accelerator
578
Architecture and design of the parser used in the embedded browser based on DFA
579
Architecture and design synthesis of 2.5 Gsamples/s 4-b pipelined flash ADC in SoC applications
580
Architecture and design trends for convergence devices [wireless communication]
581
Architecture and details of a high quality, large-scale analytical placer
582
Architecture and development environment of a knowledge-based monitor that facilitate incremental knowledge-base development
583
Architecture and development of an environmental acquisition and reporting system
584
Architecture and development of distributed WWW caching proxy
585
Architecture and development of telecommunications networks
586
Architecture and development of the CDF hardware event builder
587
Architecture and download behavior of Xunlei:A measurement-based study
588
Architecture and DSP Implementation of a DVB-S2 Baseband Demodulator
589
Architecture and dynamic bandwidth allocation of multi-OLT PON systems
590
Architecture and early experience with planning for the ALV
591
Architecture and emulator in ad hoc network for providing P2P type SIP_VoIP services
592
Architecture and enablers for optimized radio resource usage in heterogeneous wireless access networks: The IEEE 1900.4 Working Group
593
Architecture and evaluation of a high-speed networking subsystem for distributed-memory systems
594
Architecture and evaluation of INGA an inexpensive node for general applications
595
Architecture and Evaluation of Tele-Haptic Environments
596
Architecture and experiences of a multi-service HFC network
597
Architecture and Experimental Evaluation of a 10Gb/s MLSD-Based Transceiver for Multimode Optical Fibers
598
Architecture and features for 5G mobile personal cell
599
Architecture and filtering requirements for fully digital multi-radio transmitters
600
Architecture and finite precision optimization for layered LDPC decoders
601
Architecture and first prototype tests of the Clear-PEM electronics systems
602
Architecture and floorplan design techniques for video-rate FIR filters
603
Architecture and FPGA Design of Dichotomous Coordinate Descent Algorithms
604
Architecture and FPGA implementation of a 10.7 Gbit/s OTN Regenerator for optical communication systems
605
Architecture and FPGA implementation of LTE PSS and SSS synchronizer
606
Architecture and FPGA implementation of the CORDIC algorithm for fingerprints recognition systems
607
Architecture and FPGA-implementation of a high throughput K+-Best detector
608
Architecture and FPGA-Implementation of Scalable Picture Segmentation by 2D Scanning with Flexible Pixel-Block Size
609
Architecture and Framework for Supporting Open-Access Multi-user Wireless Experimentation
610
Architecture and front-end for in-vivo blood glucose sensor based on impedance spectroscopy
611
Architecture and functional requirements of control planes for automatic switched optical networks: experience of the IST project LION
612
Architecture and functional requirements of control planes for automatic switched optical networks: experience of the IST project LION
613
Architecture and functionalities of a smart Distribution Management System
614
Architecture and functionality in M2M standards
615
Architecture and functionality of a specification environment for distributed software
616
Architecture and Functioning of Large-Scale Distributed Reconfigurable Computer Systems
617
Architecture and functioning principles of diagnostic test-block of expert tutoring system
618
Architecture and functions of a commercial software reengineering workbench
619
Architecture and fuzzy adaptive security algorithm in intelligent firewall
620
Architecture and hardware for scheduling gigabit packet streams
621
Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator
622
Architecture and IC implementation of a digital VRM controller
623
Architecture and IC implementation of a digital VRM controller
624
Architecture and im lementation of lPv6 PIM-SSM in Linux systems
625
Architecture and implementation for a high reliability long-term mission space computer
626
Architecture and implementation for communications — SPC-02
627
Architecture and implementation for scalable transfer of live videos in multimedia applications
628
Architecture and implementation of 3D field support in semiconductor wafer representation
629
Architecture and implementation of a bitserial sorter for weighted median filtering
630
Architecture and Implementation of a Data Compression System at Switch-Level in ATA-over-Ethernet Storage Networks
631
Architecture and implementation of a development board for low-power education
632
Architecture and implementation of a distributed reconfigurable metacomputer
633
Architecture and Implementation of a First-Generation Iterative Detection Read Channel
634
Architecture and implementation of a Frame Aggregation Unit for optical frame-based switching
635
Architecture and implementation of a high-definition video co-processor for digital television applications
636
Architecture and implementation of a highly parallel single-chip video DSP
637
Architecture and Implementation of a Low-Power LVDS Output Buffer for High-Speed Applications
638
Architecture and implementation of a multimedia conference system
639
Architecture and implementation of a multisensor system for robotic assembly environment
640
Architecture and implementation of a network-based educational hypermedia system
641
Architecture and implementation of a novel tag computation circuit for broadband wireless access packet scheduling
642
Architecture and implementation of a remote management framework for dynamically reconfigurable devices
643
Architecture and Implementation of a Semantic Network Model-Based Information Integration
644
Architecture and implementation of a single-chip programmable digital television and media processor
645
Architecture and implementation of a Software-Defined Radio baseband processor
646
Architecture and implementation of a truly parallel ATE capable of measuring pico ampere level current
647
Architecture and implementation of a vector MAC unit for complex number
648
Architecture and implementation of a vector/SIMD multiply-accumulate unit
649
Architecture and implementation of a VLIW supercomputer
650
Architecture and implementation of an adaptive nanopositioning controller for fast spiral scanning
651
Architecture and implementation of an affordable differential GPS system
652
Architecture and implementation of an agent-based simulation tool for market-based pricing in next-generation wireless networks
653
Architecture and implementation of an associative memory using sparse clustered networks
654
Architecture and implementation of an efficient and robust TDMA frame structure for digital portable communications
655
Architecture and implementation of an efficient and robust TDMA frame structure for digital portable communications
656
Architecture and implementation of an embedded reconfigurable logic core in CMOS 0.13 μm
657
Architecture and Implementation of an Embedded Wormhole
658
Architecture and implementation of an information-centric device-to-device network
659
Architecture and Implementation of an Interpolation Processor for Soft-Decision Reed–Solomon Decoding
660
Architecture and implementation of an iterative receiver for MIMO systems
661
Architecture and implementation of an on-line data archive and distribution system
662
Architecture and Implementation of Attribute Reduction Algorithm Using Binary Discernibility Matrix
663
Architecture and implementation of chip multiprocessors: custom logic components and software for rapid prototyping
664
Architecture and implementation of distributed control system for MEMS-based intelligent motion surface
665
Architecture and implementation of ICs for a DSC-HDTV video decoder system
666
Architecture and implementation of intelligent control systems for smart consumer appliances via Internet
667
Architecture and implementation of Libra-a library for reliable distributed applications
668
Architecture and Implementation of Modular Airthmetic Unit for SOC
669
Architecture and implementation of modular wireless sensor network node
670
Architecture and implementation of multi-processor SoCs for advanced set-top box and digital TV systems
671
Architecture and implementation of planar 4 × 4 Ku-Band Nolen Matrix using SIW technology
672
Architecture and Implementation of Power and Area Efficient Receiver Equalization Circuit for High-Speed Serial Data Communication
673
Architecture and implementation of radio access protocols in wireless ATM networks
674
Architecture and implementation of real-time 3D stereo vision on a Xilinx FPGA
675
Architecture and Implementation of Sockets Direct Protocol in Windows
676
Architecture and implementation of the access mechanism for a bus-structured multiservice LAN
677
Architecture and implementation of the front-end electronics of the time projection chambers in the T2K experiment
678
Architecture and Implementation of the Front-End Electronics of the Time Projection Chambers in the T2K Experiment
679
Architecture and implementation of the reliable router
680
Architecture and implementation of the socket interface on top of GAMMA
681
Architecture and implementation of Vulcan
682
Architecture and Incentive Design of Integrated Cellular and Disruption Tolerant Networks
683
Architecture and information technoloy a conceptual framework
684
Architecture and infrastructure of health maintenance systems
685
Architecture and instruction set of a programmable LSI digital filter
686
Architecture and instrumentation in a modular interactive system
687
Architecture and interconnect technologies for a novel conformal active phased array radar module
688
Architecture and interpretation of wide-area water pollution sources monitoring and control system
689
Architecture and Key Issues of IMS-Based Cloud Computing
690
Architecture and Key Technologies of Interactive Intelligent Communication
691
Architecture and key technologies of learning resource management based on Grid system
692
Architecture and Key Technologies of Streaming Media of Cultural Grid
693
Architecture and Key Technologies of the Next Generation Service Platform
694
Architecture and language support for fault-tolerance in complex real-time systems
695
Architecture and maintenance in object technology
696
Architecture and measured characteristics of a cloud based internet of things
697
Architecture and mechanisms of a Web-based video data management system
698
Architecture and memory requirements for stand-alone and hierarchical MPEG2 HDTV-decoders with synchronous DRAMs
699
Architecture and metadata description based on education resource grid
700
Architecture and methodology of a SoPC with 3.25Gbps CDR based SERDES and 1Gbps dynamic phase alignment
701
Architecture and Mobile IPv6 extensions supporting mobile networks in mobile communications
702
Architecture and mobility management issues for wireless next generation networks
703
Architecture and mobility management protocols for next-generation wireless systems (NGWS)
704
Architecture and model of Profinet IO
705
Architecture and modeling of a novel optical beamforming network suitable for microwave photonics implementation
706
Architecture and Models for Self-Adaptability of Transport Protocols
707
Architecture and navigation strategy of BCI based semi-autonomous mobile robot
708
Architecture and network configuration of the service platform oriented fiber access network
709
Architecture and object model for distributed object-oriented real-time databases
710
Architecture and operating experience for an optical wireless OC-3 network from the USS John C Stennis to a North Island pier-side facility
711
Architecture and operating system design of the M/sup 2/ Database Machine
712
Architecture and operation of an adaptable communication substrate
713
Architecture and optimal configuration of a real-time multi-channel memory controller
714
Architecture and optimization approach of Ubiquitous Energy Network (UEN)
715
Architecture and organization of e-Assessment cloud solution
716
Architecture and overview of MMST machine control [semiconductor manufacturing facilities]
717
Architecture and performance analysis of a DSP sub-system for multi-channel voice over network (VoN) gateways
718
Architecture and Performance Analysis of Lossless FFT in OFDM Systems
719
Architecture and Performance Analysis of the Multicast Balanced Gamma Switch for Broadband Communications1
720
Architecture and performance characterization of hardware and software implementations of the Crozier frequency estimation algorithm
721
Architecture and performance comparison of a statistic-based lottery arbiter for shared bus on chip
722
Architecture and Performance Evaluation for P2P Application in 3G Mobile Cellular Systems
723
Architecture and performance evaluation of 3D CMOS-NEM FPGA
724
Architecture and performance evaluation of MmWave based 5G mobile communication system
725
Architecture and performance evaluation of the edge router for an Integrated Hybrid Optical Network
726
Architecture and performance models for scalable IP lookup engines on FPGA
727
Architecture and performance of 3-dimensional SOI circuits
728
Architecture and performance of a distributed mixed voice/data switching system with variable bit-rate lines
729
Architecture and Performance of a Grid-Enabled Lookup-Based Biomedical Optimization Application: Light Scattering Spectroscopy
730
Architecture and performance of a large area multiprocessor system for real-time video processing
731
Architecture and performance of a multicomputer type digital signal processing system `NOVI´
732
Architecture and performance of a multi-Tbps protocol independent switching fabric
733
Architecture and performance of a new arithmetic unit for the computation of elementary functions
734
Architecture and Performance of A Next-Generation Optical Burst Switch (OBS)
735
Architecture and Performance of a Practical IP Fast Reroute Implementation
736
Architecture and Performance of a Scalable Telemetry Acquisition and Distribution Infrastructure
737
Architecture and Performance of an Alternative DAB Receiver Chip Set
738
Architecture and performance of an ATM-based MAC protocol for multimedia
739
Architecture and performance of an electro-optical high speed packet switch
740
Architecture and performance of an embedded IP Bluetooth personal area network
741
Architecture and performance of an indoor wireless access communications system using balanced-DCA
742
Architecture and performance of an instrumented RF system that utilizes the GNSS satellite network
743
Architecture and Performance of an Island Genetic Algorithm-Based Cognitive Network
744
Architecture and Performance of Application Networking in Pervasive Content Delivery
745
Architecture and performance of CR4 - a transparent communication mean for field buses and LANs
746
Architecture and performance of HIPPI-ATM-SONET terminal adapters
747
Architecture and Performance of Multicast Optical Network
748
Architecture and Performance of Radiation-Hardened 64-Bit SOS/MNOS Memory
749
Architecture and performance of SIGMA: a seamless mobility architecture for data networks
750
Architecture and performance of softswitch networking
751
Architecture and performance of the DELPHI trigger system
752
Architecture and Performance of the HI-Space Projector-Camera Interface
753
Architecture and performance of the Hitachi SR2201 massively parallel processor system
754
Architecture and performance of the new CESR control system
755
Architecture and performance of the PEP-II low-level RF system
756
Architecture and Performance of XML-Based Componentization of the Symbian Smartphone Platform
757
Architecture and performance overview of a highly integrated 13×13 mm Single-Package Radio (SPR) module for dualband EGSM900/GSM1800 applications
758
Architecture and performance simulation of single pair HDSL
759
Architecture and performance testing of a software GPS receiver for space-based applications
760
Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor
761
Architecture and plurality
762
Architecture and principle of a novel coordinate structure hybrid excitation synchronous machine
763
Architecture and Principles for the Customer Self-Service Management in Telecommunication
764
Architecture and programming model support for efficient heterogeneous computing on tigthly-coupled shared-memory clusters
765
Architecture and programming of a multirate digital filter
766
Architecture and protocol design for a car-to-infrastructure packet radio network
767
Architecture and protocol for reliable event delivery to clients of a high-availability cluster
768
Architecture and Protocol for User-Controlled Access Management in Web 2.0 Applications
769
Architecture and protocol of a passive optical packet-switched metropolitan/wide area network using WDMA
770
Architecture and protocols for HORNET: a novel packet-over-WDM multiple-access MAN
771
Architecture and protocols for IN/Internet interworking
772
Architecture and protocols for LTE-based device to device communication
773
Architecture and Protocols for Secure LAN by Using a Software-Level Certificate and Cancellation of ARP Protocol
774
Architecture and protocols for the Internet of Things: A case study
775
Architecture and protocols in an IP-based integrated terrestrial/satellite mobile communications network
776
Architecture and Protocols in Wireless Networking
777
Architecture and Protocols of the RAMPE system- An Interactive Auditive Machine Helping Blinds in Public Transport
778
Architecture and prototype of augmented Reality videophone service
779
Architecture and prototyping of an 802.11-based self-organizing hierarchical ad-hoc wireless network (SOHAN)
780
Architecture and rate control for network TV broadcasting on application-oriented QOS
781
Architecture and realization for telemedical system
782
Architecture and realization of a multi signal processor system
783
Architecture and realization of a residential Telco platform
784
Architecture and Realization of Simulator of Video Grid
785
Architecture and realization of the modular expandable multiprocessor system MEMSY
786
Architecture and realization on interactive ePortfolios system for deep learning
787
Architecture and real-time characteristics analysis of the cyber-physical system
788
Architecture and Recipient Selection of Emergency Messaging for Ambulance Traveling
789
Architecture and reengineering
790
Architecture and reliability of fault tolerant bitonic sorter
791
Architecture and representation for handling dialogues in human-robot interactions
792
Architecture and representation: Digital surveying of Pavilion 19 of the former Slaughterhouse (Ex Mattatoio) of Rome
793
Architecture and requirements for a Windows screen reader
794
Architecture and routability analysis for row-based FPGAs
795
Architecture and safety requirements of the ACC railway interlocking system
796
Architecture and Scalability Issues for the Provision of Anonymous Real-Time Mobile Community Services
797
Architecture and scale issues in static schedules
798
Architecture and Scheduling Algorithm for a Multi-Channel Wireless Infrastructure Network with Diversity Management Layer
799
Architecture and schemes for intelligent mobility management in future mobile telecommunication systems
800
Architecture and secure implementation for video conferencing technique
801
Architecture and service scenario for multi-media voice among BcN operators
802
Architecture and services of a remote sensing spectral knowledge base
803
Architecture and signaling for rapid infrastructure deployment using wireless communications networks
804
Architecture and signaling protocols for wireless CATM networks
805
Architecture and simulation of a hybrid memristive multiplier network using redundant number representation
806
Architecture and simulation of sensor network system for urban surveillance
807
Architecture and simulation results of a high-speed multichannel integrated circuit for optical radiation sensors
808
Architecture and Software Implementation of HDTV Video Decoder on a Singlechip, MPEG Decoder
809
Architecture and statistical model of a pulse-mode digital multilayer neural network
810
Architecture and structured representations for an autonomous agent
811
Architecture and switch-detected error analysis of advanced intelligent network AIN/1
812
Architecture and synchronization of multimedia data for presentational applications
813
Architecture and synthesis for multi-cycle on-chip communication
814
Architecture and synthesis for on-chip multicycle communication
815
Architecture and synthesis issues in FPGAs
816
Architecture and system analysis of microgrids with peer-to-peer electricity sharing to create a marketplace which enables energy access
817
Architecture and System Characteristic of Distributed Computer Network with Autonomous Sensors Equipment
818
Architecture and system design issues of contemporary Web-based Information Systems
819
Architecture and system design optimization for the next generation of FTTC systems
820
Architecture and System Performance of SPAN -NovAtel´s GPS/INS Solution
821
Architecture and technical alternatives for connecting cockpits to FAA data
822
Architecture and technical alternatives for connecting cockpits to FAA data
823
Architecture and technologies for higher speed transport networks
824
Architecture and technology considerations for multimedia broadband communications
825
Architecture and technology for a flexible ATM switch element and network
826
Architecture and technology for global networking
827
Architecture and technology for multistandard transceivers
828
Architecture and technology for the all-fiber loop
829
Architecture and technology of FPGAs-an overview
830
Architecture and technology tradeoffs in the design of next-generation multiprocessor servers
831
Architecture and tools for programmable QCA
832
Architecture and tools for the generation of Flight Intent from mission intent for a fleet of Unmanned Aerial Systems
833
Architecture and traffic modelling of a utility metering wireless sensor network
834
Architecture and trajectory constraint control of a five bar Cobot
835
Architecture and UML models of mobile learning application for course content
836
Architecture and user interface of KB-DSS development environment
837
Architecture and VLSI design of a VLSI neural signal processor
838
Architecture and VLSI design of a VLSI neural signal processor
839
Architecture and VLSI Implementation of a programmable HD Real-Time Motion Estimator
840
Architecture and VLSI implementation of a RISC core for a monolithic video signal processor
841
Architecture and VLSI implementation of digital symbol timing recovery for DTV receivers
842
Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes
843
Architecture approach for ICT supply chain integrity
844
Architecture approaching the atomic scale
845
Architecture approaching the atomic scale
846
Architecture as a Shared Hallucination
847
Architecture as alchemy: changing documentation languages and their translation into built forms
848
Architecture as information space
849
Architecture as it controls a simulated autonomous vehicle
850
Architecture as Language
851
Architecture Assessment Model for System Evolution
852
Architecture Aware Resource Allocation for Structured Grid Applications: Flood Modelling Case
853
Architecture based approach to the control software design
854
Architecture Based Development with DYNACOMM: Incorporating Dynamic Reconfiguration and Hierarchical Design into CommUnity
855
Architecture Based on Array Processors for Data-Dependent Superimposed Training Channel Estimation
856
Architecture based on mobile agent and PEIDs technologies to improve innovation in PLM
857
Architecture based prototypes for mobile collaborative learning (MCL) to improve pedagogical activities
858
Architecture Based Ripple Effect Analysis: a Software Quality Maintenance Perspective
859
Architecture based software system cost estimation
860
Architecture Centric Approach to Enhance Software Testing Management
861
Architecture Centric System Design for Supporting Reconfiguration of Service Oriented Systems
862
Architecture challenges of future mobile networks
863
Architecture classification for SOA-based applications
864
Architecture combination by micro photoforming process
865
Architecture combining SOA and BPM
866
Architecture comparison for concurrent multi-band linear power amplifiers
867
Architecture comparisons between Nvidia and ATI GPUs: Computation parallelism and data communications
868
Architecture Complexity and Energy Efficiency of Small Wind Turbines
869
Architecture Compliance Checking - Experiences from Successful Technology Transfer to Industry
870
Architecture Compliance Checking at Runtime: An Industry Experience Report
871
Architecture Compliance Checking of Semantically Rich Modular Architectures: A Comparative Study of Tool Support
872
Architecture comprehension tools for a PBX system
873
Architecture concept for Earth Observation data mining system
874
Architecture Concept of a Wireless Body Area Sensor Network for Health Monitoring of Elderly People
875
Architecture Concepts for a Future Heterogeneous, Survivable Tactical Internet
876
Architecture Conformance Analysis Approach within the Context of Multiple Product Line Engineering
877
Architecture conformance checking of multi-language applications
878
Architecture Consideration and Performance Analysis of High Speed- Adaptively Coherent Demodulator for Multi-State QAM Transmission
879
Architecture considerations and integrated-passives-based design for a dual-mode GPRS-WLAN SiGe RF transceiver
880
Architecture Considerations for 60 GHz Pulse Transceiver Front-Ends
881
Architecture considerations for 60 GHz wireless networks
882
Architecture Considerations for Digital Automatic Flight Control Systems
883
Architecture considerations for frequency domain adaptive equalizers
884
Architecture Considerations for Spaced Repetition Based Mobile Learning Games on iOS
885
Architecture considerations in merging multi-vendor WDM rings for the MONET Washington D.C. network
886
Architecture constraints for Interoperability and composability in a smart grid
887
Architecture constraints over dynamic current consumption
888
Architecture construction of frequency synthesizer and features modeling VCO
889
Architecture Control and Model Identification of a Omni-Directional Mobile Robot
890
Architecture decisions: demystifying architecture
891
Architecture dedicated to the MMSE equalizer of iterative receiver for linearly precoded MIMO systems
892
Architecture definition for small satellite personal communications systems
893
Architecture definition of non-binary hardware processor & possible applications Possibility of processor for human like activities in robotics
894
Architecture description language based on object-oriented Petri nets for multi-agent systems
895
Architecture description language based on software reliability evaluation for distributed computing system
896
Architecture description language based retargetable symbolic execution
897
Architecture description languages for high-integrity real-time systems
898
Architecture description languages for programmable embedded systems
899
Architecture Description Languages in Practice Session Report
900
Architecture Description Leveraging Model Driven Engineering and Semantic Wikis
901
Architecture design and analysis of a distributed test and control system based on new power supply system
902
Architecture design and analysis of image-based rendering engine
903
Architecture Design and Assessment with Design Matrix
904
Architecture Design and Developing Techniques for Rescue Agent
905
Architecture Design and Efficiency Evaluation for the High-Throughput Interpolation in the HEVC Encoder
906
Architecture Design and Implementation of an Ad-Hoc Network for Disaster Relief Operations
907
Architecture design and implementation of Beijing digital school system based on Cloud Computing
908
Architecture design and implementation of ERA based tropical agricultural sensing system
909
Architecture design and implementation of the increasing radius - List sphere detector algorithm
910
Architecture Design and Implementation of the Metric First List Sphere Detector Algorithm
911
Architecture design and performance evaluation for future green small cell wireless networks
912
Architecture design and technical methodology for bus testing
913
Architecture design and timing analysis of GNC system based on time-triggered architecture
914
Architecture design and VLSI hardware implementation of image encryption/decryption system using re-configurable 2D Von Neumann cellular automata
915
Architecture design and VLSI implementation for JPEG2000
916
Architecture Design and VLSI Implementation of the Re-conf1gurable 2-D CAT/ICAT Chip for the Applications of Image Compression
917
Architecture design exploration of three-dimensional (3D) integrated DRAM
918
Architecture design for a low-cost and low-complexity foreground object segmentation with Multi-model Background Maintenance algorithm
919
Architecture design for deblocking filter in H.264/JVT/AVC
920
Architecture design for FPGA implementation of finite interval CMA
921
Architecture Design for Globally Distributed Projects
922
Architecture Design for H.264/AVC Integer Motion Estimation with Minimum Memory Bandwidth
923
Architecture Design for Joint Operation and Command Information System-of-Systems
924
Architecture design for management as a service cloud
925
Architecture Design for Median Filter
926
Architecture design for MPEG-2 AAC filterbank decoder using modified regressive method
927
Architecture design for new AC-DC hybrid micro-grid
928
Architecture Design for Service Network Deployment, Customization and Execution
929
Architecture design for SPX: Secure networking Platform for group-oriented eXchange
930
Architecture Design for the Context Formatter in the H.264/AVC Encoder
931
Architecture Design for the Large-Scale Software-Intensive Systems: A Decision-Oriented Approach and the Experience
932
Architecture design framework for flexible and configurable WiMAX OFDMA baseband transceiver
933
Architecture Design of a Data Intensive Satellite Image Processing and Distribution System
934
Architecture design of a fast feed-forward blind equalizer with joint generalized multilevel modulus and low-cost soft decision directed scheme for cable modem receiver
935
Architecture design of a fast symbol timing synchronization system with a shared architecture for wireless ATM
936
Architecture design of a fully asynchronous VLSI chip for DSP custom applications
937
Architecture design of a high-performance dual-symbol binary arithmetic coder for JPEG2000
938
Architecture Design of a High-Quality Speech Synthesizer Based on the Multipulse LPC Technique
939
Architecture design of a multiaxis cellular actuator array using segmented binary control of shape memory alloy
940
Architecture Design of a Network Traffic Simulation System Based on Self-Similar Model
941
Architecture design of a scalable single-chip multi-processor
942
Architecture design of a switching chip inside optical Ethernet switches
943
Architecture design of a vision-based intelligent system for automated disassembly of E-waste with a case study of traction batteries
944
Architecture design of an early warning monitoring system for chemical water bodies contamination
945
Architecture design of an Equipment Inspection System based on NFC & Mobile Internet
946
Architecture design of an H.264/AVC decoder for real-time FPGA implementation
947
Architecture Design of an Integrated Communication and Broadcasting Network
948
Architecture design of an intelligent information fusion agent for information retrieval from dynamic environments
949
Architecture design of an MPEG-4 system
950
Architecture design of area-efficient SRAM-based multi-symbol arithmetic encoder in H.264/AVC
951
Architecture design of artificial neural networks based on Box & Jenkins models for time series prediction
952
Architecture Design of Belief Propagation for Real-Time Disparity Estimation
953
Architecture design of CAD platform
954
Architecture design of campus information convergence system for E-learning based on web service technology
955
Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC
956
Architecture design of disaster risk assessment and warning system based on UML
957
Architecture Design of Embedded Home IMS Gateway based on Convergence of IMS and Home Network
958
Architecture Design of Fine Grain SNR Scalable Encoder with CABAC for H.264/AVC Scalable Extension
959
Architecture design of full HD JPEG XR encoder for digital photography applications
960
Architecture design of grid GIS and its applications on resource sharing
961
Architecture design of ground telecommand encryption function for spacecraft
962
Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos
963
Architecture Design of High Efficient and Non-memory AES Crypto Core for WPAN
964
Architecture design of high performance embedded compression for high definition video coding
965
Architecture design of illumination change progressive motion estimation algorithm
966
Architecture Design of Intelligent Platform for MIS
967
Architecture Design of Intelligent Platform for MIS
968
Architecture Design of Internet of Things in Logistics Management for Emergency Response
969
Architecture design of IT education platform based on web mining
970
Architecture design of joint mission space model based on BOM
971
Architecture Design of Low Power Integer Motion Estimation for H. 264/AVC
972
Architecture design of low-power and low-cost CAVLC decoder for H.264/AVC
973
Architecture design of Manado e-Government ICT networks: The road to Manado Smart City
974
Architecture Design of Mass Data Processing Mode
975
Architecture design of MDCT-based psychoacoustic model co-processor in MPEG advanced audio coding
976
Architecture design of mobile access coordinated wireless sensor networks
977
Architecture design of mobile cloud and prototype test
978
Architecture design of MPEG-2 decoder system
979
Architecture design of MPEG-4 texture decoder supporting object-based video coding
980
Architecture design of optical customer premises network
981
Architecture design of PDM system based on Web service
982
Architecture Design of QPP Interleaver for Parallel Turbo Decoding
983
Architecture Design of Reconfigurable Accelerators for Demanding Applications
984
Architecture design of reconfigurable pipelined datapaths
985
Architecture Design of Reconfigurable Protocol Stack for nodes in NCS
986
Architecture design of reconfigurable reed-solomon error correction codec
987
Architecture Design of Risk Control System for Social Medical Insurance
988
Architecture Design of RP-Oriented Rapid Response Service System
989
Architecture Design of Shape-Adaptive Discrete Cosine Transform and Its Inverse for MPEG-4 Video Coding
990
Architecture design of spaceborne SAR imaging processing system
991
Architecture design of stereo matching using belief propagation
992
Architecture Design of Subject-Oriented Web Crawler
993
Architecture Design of the Double-Mode Binarization for High-Profile H.264/AVC Compression
994
Architecture Design of the H.264/AVC Encoder Based on Rate-Distortion Optimization
995
Architecture design of the high integrated System-on-Chip for biomedical applications
996
Architecture Design of the Internet of Things Based on Cloud Computing
997
Architecture design of the multi-functional wavelet-based ECG microprocessor for realtime detection of abnormal cardiac events
998
Architecture design of the re-configurable 2-D von Neumann cellular automata for image encryption application
999
Architecture design of the workflow execution system containing Humanware Services
1000
Architecture Design of Traffic Monitoring System