بر اساس عنوان

1
Are we at last seeing global movements towards software engineering professionalism?
2
Are we at the bottom?
3
Are We Becoming Socially Impaired? Computer-Mediated Communication, Human Evolution, and Social Capital
4
Are We Being Post-Positivist Yet? What Doesn´t Happen When Literary Theory Meets Technical Communication
5
Are we buddies- evaluating the impact of “word-of-mouth” on competing pricing strategies
6
Are we building the right transformers?
7
Are we developers liars or just fools [software managers]
8
Are we doing everything we can to make sure american nuclear power plants operate at the highest levels of safety?
9
Are we doing HIRF testing sensibly?
10
Are we doing multimedia?
11
Are We Enslaved by Technology? [Opinion]
12
Are we forgetting the risks of information technology?
13
Are We Getting Privacy the Wrong Way Round?
14
Are we going to lead or be led?
15
Are we in control?
16
Are we in control? (control engineering in higher education)
17
Are we living in a robot Cargo Cult?
18
Are we looking for content in all the wrong places? The significance of human factors research for complex tasks in documentation
19
Are we making our railways too safe?
20
Are We Missing Labels? A Study of the Availability of Ground-Truth in Network Security Research
21
Are we moving toward an information superhighway or a Tower of Babel? The challenge of large-scale semantic heterogeneity
22
Are we on the road to recovery?
23
Are we on the way towards design habitability?
24
Are we over designing for solder joint reliability? Field vs. accelerated conditions, realistic vs. specified requirements
25
Are we particularly musical?
26
Are we prepared for the nanotechnology revolution?
27
Are We Prepared for the Next Solar Storm? [About This Issue]
28
Are we ready for a CME eLearning Readiness Index (eCMERI)? A map and a literature review
29
Are we ready for autonomous driving? The KITTI vision benchmark suite
30
Are we ready for SDN? Implementation challenges for software-defined networks
31
Are we ready for system-level synthesis? [Panel II]
32
Are we ready to be unleashed? A comparative analysis between agile software development and war fighting
33
Are we really innovating? An exploratory study on Innovation Management and Service Management
34
Are we really protected against hackers?
35
Are we really ready for the breakthrough? [morphware]
36
Are we really ready for VLSI2?
37
Are we safe yet? [nuclear and biological terrorism threats]
38
Are we signalling safely [traffic control signals]
39
Are we still engineers?
40
Are we still engineers?
41
Are we still engineers?
42
Are we still friends: Kernel multivariate survival analysis
43
Are we still only engineers?
44
Are we testing for true reliability?
45
Are we there yet?
46
Are We There Yet?
47
Are we there yet? - a metamorphic HEMT and HBT perspective
48
Are we there yet? An examination of where we´ve been and where we´re headed as technical communicators
49
Are We There Yet? Analyzing Architecture Description Languages for Formal Analysis, Usability, and Realizability
50
Are we there yet? Exploring with dynamic visualization
51
Are we there yet? Genomic profiling and mechanism in cancer research
52
Are We There Yet? Grounding Temporal Concepts in Shared Journeys
53
Are we there yet? Has IP block assembly become as easy as LEGO?
54
Are we there yet? Perspectives on transformation to a knowledge society in Dubai public services
55
Are We There Yet? User-Centered Temporal Awareness
56
Are We There Yet?: Simple Language Implementation Techniques for the 21st Century
57
Are we trendy?
58
Are we using our instruments?
59
Are we waves or are we particles? A new insight into deep semantics in natural language processing
60
Are we wrapped in cotton wool? [Editorial]
61
Are Wearables Really Ready to Wear? [Viewpoint]
62
Are web self-assessment tools useful for training?
63
Are Web services finally ready to deliver?
64
Are Web Visibility and Data Quality Related Concepts?
65
Are websites optimized for mobile devices and Smart TVs?
66
Are wireless sensors feasible for aircraft?
67
Are working adults ready to accept e-Health at home?
68
Are wound-rotor synchronous motors suitable for use in high efficiency torque-dense automotive drives?
69
Are yesterday-s information-theoretic fading models and performance metrics adequate for the analysis of today´s wireless systems?
70
Are Yield and Biomass Distribution Affected by Sink Organ Clipping During Reproductive Phase of Winter Oilseed Rape (Brassica napus L.)?
71
Are you “pulling the plug” or “pushing up the daisies”? [communication patterns]
72
Are you a ´vigilant leader´?
73
Are You a Cat ... or a Mouse?
74
Are You a Cat ... or a Mouse?
75
Are You a Cat ... or a Mouse? [Call for authors]
76
Are you a cat or a mouse?
77
Are you a cat...or a mouse?
78
Are you a collaborative leader?
79
Are you a collaborative leader?
80
Are you a pogonophile?
81
Are You a Safe Driver?
82
Are you aware? [Reflections]
83
Are you Awerewolf? Detecting deceptive roles and outcomes in a conversational role-playing game
84
Are you balanced?
85
Are You Becoming a Diabetic? A Data Mining Approach
86
Are you being ruined by best efforts: does your maintenance & reliability strategy really support defect elimination and incident avoidance?
87
Are you being served? [Manufacturing]
88
Are you being surveyed? [Certification Corner]
89
Are you certain you understand the economics for applying ASD systems to centrifugal loads?
90
Are You Communicating?
91
Are you conscious, and can you prove it?
92
Are You Done Yet?
93
Are You Efficient, Trendy or Skillfull? An Exploratory Segmentation of Mobile Service Users
94
Are you emotional but intelligent - or are you emotionally intelligent? [emotional intelligence]
95
Are You Exhausted by Your First Sale?
96
Are you feeling safe yet?-advances in security screening technology
97
Are You Going to the Party: Depends, Who Else is Coming?: [Learning Hidden Group Dynamics via Conditional Latent Tree Models]
98
Are you having fun yet?
99
Are you Hiding from New Software Opportunities? [advertisement]
100
Are You in Bed with Technology?
101
Are you in the picture yet? [advertisement]
102
Are you in the right job?
103
Are you in?
104
Are you interested in becoming IEEE-USA´s 2010 Mass Media Fellow
105
Are you interested?
106
Are you just a voice from the shadows?
107
Are you keeping up with technology - or falling behind? [ieee proceedings advertisement]
108
Are you keeping up with technology or falling behind [advertisement]
109
Are you keeping up with technology or falling behind [advertisement]
110
Are you keeping up with technology or falling behind [advertisement]
111
Are you keeping up with technology or falling behind [advertisement]
112
Are you keeping up with technology or falling behind [advertisement]
113
Are you keeping up with technology or falling behind [advertisement]
114
Are you keeping up with technology or falling behind [advertisement]
115
Are you keeping up with technology or falling behind [advertisement]
116
Are you keeping up with technology or falling behind [advertisement]
117
Are you keeping up with technology or falling behind [advertisement]
118
Are you keeping up with technology or falling behind [advertisement]
119
Are you keeping up with technology or falling behind [advertisement]
120
Are you keeping up with technology or falling behind [advertisement]
121
Are you keeping up with technology or falling behind [advertisement]
122
Are you leading the way in innovation? - [management innovation]
123
Are you leaping ahead?
124
Are you leaping ahead?
125
Are you Leaping Ahead? - Innovation in Engineering Awards 2006
126
Are you listening? The case for sound in the communications interface
127
Are you looking at me? Perception of robot attention is mediated by gaze type and group size
128
Are you Missing out on an Important Element Contributing to your Career and Professional Growth?
129
Are you my friend? [Twitter response estimator]
130
Are You OK as a Foundry Manager?
131
Are You Prepared for Daylight Saving Time 2007?
132
Are you protecting your intellectual property?
133
Are you qualified to be a director?
134
Are you ready for contract manufacturing? [power supply industry]
135
Are you ready for lead-free electronics?
136
Are You Ready For Mrp? (a Company Self Evaluation Dss)
137
Are you ready for next-generation dynamic RAM chips?
138
Are you ready for part p?
139
Are you Ready for the 80´s?
140
Are you Ready for the 80´s?
141
Are you Ready for the 80´s?
142
Are You Ready to Take a Dive? [Entrepreneur Viewpoint]
143
Are You Ready to Use? Assessing the Meaning of Social Influence and Technology Readiness in Collaboration Technology Adoption
144
Are You Receiving the Mentorship You Need? [Continuing Education]
145
Are you safe with your temporary protective grounds? (Case study)
146
Are You Satisfied?
147
Are you sitting comfortably?
148
Are You Smarter than the TSA? (Hint: No)
149
Are you still there? - A lightweight algorithm to monitor node presence in self-configuring networks
150
Are You Sure You Had a Privacy Incident?
151
Are You Sure You Had a Privacy Incident?
152
Are you sure you want to use that data in your study?
153
Are You Sure? Really? A Contextual Approach to Agile User Research
154
Are you up-to-date on US specifications?
155
Are you using the right approximate nearest neighbor algorithm?
156
Are you using the right questions (when you select automation equipment)
157
Are your communication skills good enough
158
Are Your Hosts Trading or Plotting? Telling P2P File-Sharing and Bots Apart
159
Are Your Images Being Rip Ped Off?
160
Are your incoming aliases really necessary? Counting the cost of object ownership
161
Are Your Lights Off? Using Problem Frames to Diagnose System Failures
162
Are Your Papers in Order? Developing and Enforcing Multi-tenancy and Migration Policies in the Cloud
163
Are your sites down? Requirements-driven self-tuning for the survivability of Web systems
164
Are your systems safety-critical?
165
Are your trigger rules correct?
166
Area - time - power and design effort: the basic tradeoffs in application specific systems
167
Area & power efficient VLSI architecture for computing pseudo inverse of channel matrix in a MIMO wireless system
168
Area & delay driven binding algorithm of RTL tech. mapping for heterogeneous FPGAs
169
Area & Power Efficient 3.4Gbps/Channel HDMI Transmitter with Single-Ended Structure
170
Area & power optimization of VPB peripheral memory for ARM7TDMI based microcontrollers
171
Area 1 program summary
172
Area 1 program summary
173
Area 1 program summary
174
Area 5: community aspects, opportunities for growth. When failure didn´t matter: network technology and the reinvention of community
175
Area Aggregation and Time Scale Modeling for Sparse Nonlinear Networks
176
Area aggregation of network systems
177
Area Air Traffic Flow Optimal Scheduling Under Uncertain Weather
178
Area and delay aware approaches for realizing multi-operand addition on FPGAs using two-operand adders
179
Area and delay mapping for table-look-up based field programmable gate arrays
180
Area and delay optimization for Networks-on-Chip architectures using Genetic Algorithms
181
Area- and efficiency-optimized junction termination for a 5.6 kV SiC BJT process with low ON-resistance
182
Area and energy efficient 802.11ad LDPC decoding processor
183
Area and Energy Efficient High-Performance ZnO Wavy Channel Thin-Film Transistor
184
Area and energy-efficient crosstalk avoidance codes for on-chip buses
185
Area- and energy-efficient high-throughput LDPC decoders with low block latency
186
Area and frequency optimized 1024 point Radix-2 FFT processor on FPGA
187
Area and laser power scalability analysis in photonic networks-on-chip
188
Area and latency efficient CORDIC architectures
189
Area and latency improvements for direct digital synthesis using the residue number system
190
Area and latency optimized high-throughput Min-Sum based LDPC decoder architectures
191
Area and length minimizing flows for shape segmentation
192
Area and length minimizing flows for shape segmentation
193
Area and length preserving geometric invariant scale-spaces
194
Area and Memory Efficient Architectures for 3D Blu-ray-compliant Multimedia Processors
195
Area and MIT optimization of selective Zigzag power gating
196
Area and performance analysis of value predictors
197
Area and performance comparison of pipelined RISC processors implementing different precise interrupt methods
198
Area and performance comparison of pipelined RISC processors implementing different precise interrupt methods
199
Area and performance optimizations in path-based scheduling
200
Area and performance study of FinFET with detailed parasitic capacitance analysis in 16nm process node
201
Area and power analysis of AES using hardware and software Co-design
202
Area and power efficient 4-bit comparator design by using 1-bit full adder module
203
Area and Power Efficient Array and Tree Multipliers
204
Area and power efficient carry select adder using 8T full adder
205
Area and power efficient decimal carry-free adder
206
Area and power efficient design of coarse time synchronizer and frequency offset estimator for fixed WiMAX systems
207
Area and power efficient layout design of Schmitt trigger
208
Area and power efficient mismatched filters based on sidelobe inversion
209
Area and power efficient network on chip router architecture
210
Area and power efficient pattern prediction architecture for filter cache access prediction in the instruction memory hierarchy
211
Area and power efficient pipeline FFT algorithm
212
Area and Power Efficient Synthesis of DPA-Resistant Cryptographic S-Boxes
213
Area and power efficient trellis computational blocks in 0.13μm CMOS
214
Area and power efficient VLSI architecture for DCT
215
Area and Power Modeling Methodologies for Networks-on-Chip
216
Area and power optimisation for AES encryption module implementation on FPGA
217
Area and power optimization of FPRM function based circuits
218
Area and Power Optimization of High-Order Gain Calibration in Digitally-Enhanced Pipelined ADCs
219
AREA and power optimized multipliers with minimum leakage
220
Area and power reduction in DFT based channel estimators for OFDM systems
221
Area and power reduction of embedded DSP systems using instruction compression and re-configurable encoding
222
Area and power reduction techniques for time-based image sensor pixel design
223
Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs
224
Area and power-delay efficient state retention pulse-triggered flip-flops with scan and reset capabilities
225
Area- and power-efficient 2D analog filters employing multirate signal processing techniques
226
Area- and Power-Efficient Architecture for High-Throughput Implementation of Lifting 2-D DWT
227
Area- and power-efficient DC-DC converter with on-chip compensation
228
Area- and Power-Efficient Design of Daubechies Wavelet Transforms Using Folded AIQ Mapping
229
Area and Power-efficient Innovative Network-on-Chip Architecurte
230
Area- and Power-Efficient Monolithic Buck Converters With Pseudo-Type III Compensation
231
Area and reconfiguration time minimization of the communication network in regular 2D reconfigurable architectures
232
Area and reliability efficient ECC scheme for 3D RAMs
233
Area and routing efficiency of SWD circuits compared to advanced CMOS
234
Area and search space control for technology mapping
235
Area and speed efficient floating point unit
236
Area and Speed Oriented Implementations of Asynchronous Logic Operating under Strong Constraints
237
Area and system clock effects on SMT/CMP processors
238
Area and system clock effects on SMT/CMP throughput
239
Area and Test Cost Reduction for On-Chip Wireless Test Channels with System-Level Design Techniques
240
Area and Thickness Scaling of Forming Voltage of Resistive Switching Memories
241
Area and Throughput Aware Comparator Networks Optimization for Parallel Data Processing on FPGA
242
Area and throughput efficient IDCT/IDST architecture for HEVC standard
243
Area and throughput optimized ASIP for multi-standard turbo decoding
244
Area and throughput trade-offs in design of arithmetic encoder for JPEG2000
245
Area and throughput trade-offs in the design of pipelined discrete wavelet transform architectures
246
Area- and throughput-optimized VLSI architecture of sphere decoding
247
Area and time co-optimization for system-on-a-chip based on consecutive testability
248
Area and Time Efficient Cellular Non-linear Networks
249
Area and time efficient hardwired pre -shifted bi-rotation CORDIC design
250
Area and time efficient implementations of matrix multiplication on FPGAs
251
Area and time efficient modular multiplication of large integers
252
Area and time limitations of FPGA-based virtual hardware
253
Area and time optimized realization of 16 point FFT and IFFT blocks by using IEEE 754 single precision complex floating point adder and multiplier
254
Area and timing estimation for lookup table based FPGAs
255
Area and Timing Optimisation of high performant datapaths with CHOPIN-2
256
Area and volume calculation of necrotic tissue regions of heart using interpolation
257
Area and volume effects on breakdown strength in liquid nitrogen
258
Area angle can monitor cascading outages with synchrophasors
259
Area angles monitor area stress by responding to line outages
260
Area Annual Outage Cost Assessment of KEPCO System by TRELSS
261
Area array contacts to assemble a 3D transformer for a miniaturized voltage converter
262
Area array encapsulation with stencil printing and microwave curing
263
Area array interconnection with Cu-PI thin films on a multi-layer glass-ceramic substrate
264
Area array packaging technologies for high-performance computer workstations and multiprocessors
265
Area array solder interconnection technology for the three-dimensional silicon cube
266
Area Assessment of Psoriasis Lesion for PASI Scoring
267
Area automatic generation control by multi-pass dynamic programming
268
Area automatic voltage control based on wind power forecasting of large-scale wind farms
269
Area Automatic Voltage Control of Large-Scale Wind Farms
270
Area Avoidance Routing in Distance-Vector Networks
271
Area Based Approach to Registration of SAR Images with Sub-pixel Accuracy
272
Area Based Coverage for Three Deployment Distributions and Their Connectivity in Wireless Sensor Networks
273
Area Based Novel Approach for Fuzzy Edge Detection
274
Area boards in a league?
275
Area bonding conductive (ABC) adhesives for flex circuit connection to LTCC/MCM substrates
276
Area bonding conductive epoxy adhesive preforms for grid array and MCM substrate attach
277
Area bonding conductive epoxy adhesives for low cost grid array chip carriers
278
Area bonding conductive epoxy adhesives for low-cost grid array chip carriers
279
Area bounds of hierarchical graphs straightline grid drawing
280
Area census-oriented electronic reconnaissance satellites scheduling technique under uncertain space-frequency domain environments
281
Area Chairs
282
Area Chairs
283
Area Chairs
284
Area Chairs
285
Area change detection in river mouthbars at the Mekong River delta using Synthetic Aperture Radar (SAR) data
286
Area classification for combustible dusts-principles, standardisation and practice
287
Area classification for explosive atmospheres: Comparison between European and North American approaches
288
Area Classification for Explosive Atmospheres: Comparison Between European and North American Approaches
289
Area classification is not a copy and paste process
290
Area classification-an alternative approach
291
Area Classification-Past, Present, and Future
292
Area code, country code, and time difference information system and its field trial
293
Area Committee Chairman, Chapter Chairman Directory
294
Area compact 5T portless SRAM cell for high density cache in 65nm CMOS
295
Area compactness architecture for elliptic curve cryptography
296
Area comparisons of CMOS voiceband coders in scaled technologies
297
Area Concentric Beacons Localization for Wireless Sensor Networks
298
Area constraint propagation in high level synthesis
299
Area contraction of k-dimensional surfaces and almost global asymptotic stability
300
Area coverage adaptive nulling from geosynchronous satellites: Phased arrays versus multiple-beam antennas
301
Area coverage and capacity enhancement by multihop connection of CDMA cellular network
302
Area coverage based domain division in wireless sensor network
303
Area coverage for clustered directional sensor networks using Voronoi diagram
304
Area coverage in mobile radio by quasisynchronous transmissions using double-sideband diminished-carrier modulation
305
Area coverage in wireless sensor network by using harmony search algorithm
306
Area Coverage of a Multi-Link MIMO System with Water Filling Power Allocation Strategy
307
Area coverage planning that accounts for pose uncertainty with an AUV seabed surveying application
308
Area Coverage Rate of Synthetic Aperture Sonars
309
Area coverage searching for swarm robots using dynamic Voronoi-based method
310
Area coverage under low sensor density
311
Area Coverage with Unmanned Vehicles: A Belief-Based Approach
312
Area dependence of breakdown strength of polymer films: automatic measurement method
313
Area dependence of TDDB characteristics for HfO2 gate dielectrics
314
Area dependence of thermal stability factor in perpendicular STT-MRAM analyzed by bi-directional data flipping model
315
Area dependent simulation model for the double exponential effect in I(V)-characteristics of solar cells
316
Area detection technology for air conditioner
317
Area Difference Based Recovery Information Placement for Mobile Computing Systems
318
Area distributed soldering of flexible and rigid printed circuit boards
319
Area Division Based Semi-auto DV-Hop Localization algorithm in IEEGS
320
Area effect - and its extremal basis - for the electric breakdown of insulating oil
321
Area Effect and Its Extremal Basis for the Electric Breakdown of Transformer Oil [includes discussion]
322
Area effect in a thin film MIM emitter
323
Area effect in bubble model of breakdown initiation
324
Area Effect of Electrical Breakdown in Compressed SF6
325
Area effect on electric breakdown of copper and stainless steel electrodes in vacuum
326
Area effective and speed optimized fused Add-Multiply unit
327
Area effective and wide applicable architecture of error correction and detection for digital home network platform
328
Area efficiency of ADC architectures
329
Area efficiency PLL design using capacitance multiplication based on self-biased architecture
330
Area efficient 2n× switched capacitor charge pump
331
Area efficient and accurate CORDIC processor for motor control drive
332
Area efficient and high throughput CABAC encoder architecture for HEVC
333
Area efficient and high throughput CAVLC encoder for 1920×1080@30p H.264/AVC
334
Area efficient and symmetric design of monolithic transformers for silicon RF ICs
335
Area Efficient Architecture for Large Scale Implementation of Biologically Plausible Spiking Neural Networks on Reconfigurable Hardware
336
Area Efficient Architecture for the Embedded Block Coding in JPEG 2000
337
Area efficient architecture for the embedded block coding in JPEG 2000
338
Area efficient architectures for information integrity in cache memories
339
Area efficient asynchronous SDM routers using 2-stage Clos switches
340
Area efficient backprojection computation with reduced floating-point word width for SAR image formation
341
Area efficient binary tree layout
342
Area Efficient Bus Encoding Technique for Minimizing Simultaneous Switching Noise (SSN)
343
Area Efficient Charge Pump Design with Constant Output Power over the Whole Supply Range
344
Area efficient circuit tuning with floating-gate techniques
345
Area efficient CMOS charge pump circuits
346
Area efficient CMOS integrated charge pumps
347
Area efficient concurrent error detection and correction for parallel filters
348
Area efficient configurable physical unclonable functions for FPGAs identification
349
Area efficient controller design of barrel shifters for reconfigurable LDPC decoders
350
Area efficient current steering DAC using current tuning
351
Area efficient decoding of quasi-cyclic low density parity check codes
352
Area efficient delay-insensitive and differential current sensing on-chip interconnect
353
Area efficient device-parameter estimation using sensitivity-configurable ring oscillator
354
Area efficient diode and on transistor inter-changeable power gating scheme with trim options for SRAM design in nano-complementary metal oxide semiconductor technology
355
Area efficient DSP datapath synthesis
356
Area efficient error compensation circuit for fixed width unsigned multiplier by probabilistic analysis of partial product array
357
Area efficient evaluation based coding of shortened Reed-Solomon codes for memory constrained applications
358
Area efficient fast Huffman decoder for multimedia applications
359
Area efficient fault tolerant convolution using RRNS with NTTS and WSCA
360
Area Efficient FFT/IFFT Processor Design for MIMO OFDM System in Wireless Communication
361
Area efficient FIR filter using graph based algorithm
362
Area efficient floating-point adder and multiplier with IEEE-754 compatible semantics
363
Area efficient floating-point FFT butterfly architectures based on multi-operand adders
364
Area efficient front-end readout electronics for pixel detector based on inverter amplifier
365
Area efficient fully parallel distributed arithmetic architecture for one-dimensional discrete cosine transform
366
Area efficient GF(p) architectures for GF(pm) multipliers
367
Area efficient half row pipelined layered LDPC decoder for gigabit wireless communications
368
Area efficient hardware implementation of elliptic curve cryptography by iteratively applying Karatsuba´s method
369
Area efficient high and low pass filter design for DWT applications
370
Area Efficient High Speed Architecture of Bruun´s FFT for Software Defined Radio
371
Area efficient high speed elliptic curve cryptoprocessor for random curves
372
Area efficient high speed low power multiplier architecture for multirate filter design
373
Area efficient IFFT/FFT core for MB-OFDM UWB
374
Area efficient implementation of noise generation system
375
Area efficient implementations of fixed-template CNN´s
376
Area Efficient Integrated Gate Drivers Based on High-Voltage Charge Storing
377
Area efficient inter-coupled differential injection enhancement wide locking range injection locked frequency divider
378
Area efficient LDPC decoder design for parallel layered decoding
379
Area efficient low power neural amplifiers using MOS and MIM capacitors in submicron technologies for ultra low corner frequencies
380
Area Efficient Low-Power Static Explicit-Pulsed Flip-Flop with Local Feedback
381
Area efficient low-sensitivity lumped madaline based on Continuous Valued Number System
382
Area efficient parallel decoder architecture for long BCH codes
383
Area efficient phase calibration of a 1.6 GHz multiphase DLL
384
Area efficient pipelined pseudo-exhaustive testing with retiming
385
Area Efficient Pipelined VLSI Implementation of List Sphere Decoder
386
Area efficient processing element architecture for compact hash functions systems on VIRTEX5 FPGA platform
387
Area efficient pseudo-parallel Galois field multipliers
388
Area efficient reconfigurable architecture for current control loop of a servo controller
389
Area Efficient ROM-Embedded SRAM Cache
390
Area efficient run time reconfigurable architecture for double precision multiplier
391
Area efficient switch box topologies for 3D FPGAs
392
Area efficient synthesis of asynchronous interface circuits
393
Area efficient system-on-programmable-chip design for a wireless touch-triggered machining probe
394
Area efficient systolic interconnection networks
395
Area efficient temporal coding schemes for reducing crosstalk effects
396
Area efficient test circuit for library standard cell qualification
397
Area efficient time to digital converter (TDC) architecture with double ring-oscillator technique on FPGA for fluorescence measurement application
398
Area efficient time-shared FIR filters in nanoscale CMOS
399
Area efficient vector multiplication for IDDT test calibration
400
Area efficient vernier Time to Digital Converter(TDC) with improved resolution using identical ring oscillators on FPGA
401
Area Efficient Viterbi-Decoder Macros
402
Area efficient VLSI architectures for Huffman coding
403
Area efficient VLSI architectures for Huffman coding
404
Area Efficient VLSI Design with Cells of Controllable Complexity
405
Area efficient, high speed parallel counter circuits using charge recycling threshold logic
406
Area efficient, high speed VLSI design for BPC coder in JPEG 2000
407
Area efficient, high-speed VLSI design for EBCOT block coder in JPEG 2000
408
Area efficient, low power and robust design for add-compare-select units
409
Area efficient-high throughput sub-pipelined design of the AES in CMOS 180nm
410
Area energy and area spectrum efficiency trade-off in 5G heterogeneous networks
411
Area energy efficiency analysis for OFDMA femtocell networks
412
Area EPS and Distributed Resources protection best practices
413
Area estimation and optimisation of FPGA routing fabrics
414
Area estimation for DSP algorithms
415
Area estimation from ARMA analysis based on vocal-tract model
416
Area estimation from discrete and continuous land cover maps
417
Area estimation of look-up table based fixed-point computations on the example of a real-time high dynamic range imaging system
418
Area estimation of LUT based designs
419
Area estimation of time-domain GNSS receiver architectures
420
Area evaluation metrics for transistor placement
421
Area evolution of few-cycle pulse laser in two-level atom medium
422
Area failures and reliable distributed applications
423
Area fill generation with inherent data volume reduction
424
Area fill synthesis for uniform layout density
425
Area fractions by linear analysis of intensity level histograms
426
Area function Fourier descriptors based on contour split
427
Area green efficiency (AGE) of two tier heterogeneous cellular networks
428
Area Harmony Dominating Rectification Method for SIFT Image Matching
429
Area histogram for image analysis
430
Area I/O flip-chip packaging to minimize interconnect length
431
Area I/O´s potential for future processor systems
432
Area identification of bone marrow smears using radial-basis function networks and the HSI colour model
433
Area implications of memory partitioning for high-level synthesis on FPGAs
434
Area Industrial Networked Manufacturing Based on Synergistic Effect Coupled with Its Cooperation-level Analyses
435
Area matching based on belief propagation with applications to face modeling
436
Area measurement of seed from distorted images for quality seed selection
437
Area Measurement Using a Chemical Array with Image Perturbation
438
Area Measurement Using Random Image Perturbation with Discrete Arrays
439
Area miniaturization of a microstrip patch antenna and the effect on the quality factor Q
440
Area minimization for floorplans
441
Area minimization for general floorplans
442
Area Minimization For Hierarchical Floorplans
443
Area minimization for library-free synthesis
444
Area minimization in a three-sided switchbox by sliding the modules
445
Area minimization of a three-axis separate mass capacitive accelerometer using the ThELMA process
446
Area minimization of clock distribution networks using local topology modification
447
Area minimization of MPRM circuits
448
Area minimization of power distribution network using efficient nonlinear programming techniques
449
Area minimization of power distribution network using efficient nonlinear programming techniques
450
Area minimization of redundant CORDIC pipeline architectures
451
Area minimization synthesis for reconfigurable single-electron transistor arrays with fabrication constraints
452
Area minimizing flows
453
Area morphological segmentation for content based retrieval
454
Area navigation capability in a miniature airborne GPS receiver
455
Area of a polynya at Amery Ice Shelf derived from AMSR-E 89 GHz sea ice concentrations and MODIS images
456
Area of acceptance for 3D self-aligning robotic connectors: Concepts, metrics, and designs
457
Area of surface as a basis for vertex removal based mesh simplification
458
Area of vulnerability for prediction of voltage sags by an analytical method in indian distribution systems
459
Area optimization algorithm for body-bias based on input vector control
460
Area optimization for general floorplans: an analogy to resistive networks
461
Area optimization for higher order hierarchical floorplans
462
Area optimization for leakage reduction and thermal stability in nanometer scale technologies
463
Area Optimization for Leakage Reduction and Thermal Stability in Nanometer-Scale Technologies
464
Area optimization in 8T SRAM cell for low power consumption
465
Area optimization in deep sub-micron VLSI design
466
Area optimization of analog circuits considering matching constraints
467
Area optimization of bit parallel finite field multipliers with fast carry logic on FPGAS
468
Area Optimization of Combined Integer and Floating Point Circuits in High-Level Synthesis
469
Area optimization of cryptographic algorithm on less dense reconfigurable platform
470
Area optimization of cryptographic co-processors implemented in dual-rail with precharge positive logic
471
Area optimization of delay-optimized structures using intrinsic constraint graphs
472
Area optimization of lightweight lattice-based encryption on reconfigurable hardware
473
Area Optimization of Multi-Cycle Operators in High-Level Synthesis
474
Area optimization of multi-functional processing units
475
Area optimization of packing represented by sequence-pair
476
Area optimization of ROM-based controllers dedicated to digital signal processing applications
477
Area optimization on fixed analog floorplans using convex area functions
478
Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis
479
Area optimized architecture and VLSI implementation of a multi-coder processor for the WTLS
480
Area optimized architecture and VLSI implementation of RC5 encryption algorithm
481
Area optimized CMOS layouts of a 50 Gb/s low power 4:1 multiplexer
482
Area optimized FPGA implementation of color edge detection
483
Area optimized H.264 Intra prediction architecture for 1080p HD resolution
484
Area optimized implementation of AES algorithm on FPGA
485
Area optimized implementation of unsymmetric trimmed adaptive Median Filter for edge preservation on FPGA
486
AREA optimized low power arithmetic and logic unit
487
Area Optimized MOS Circuit Generation using the Circuit Synthesis Program MOSYN-2
488
Area optimized multiplier using flow retiming and input data folding
489
Area Optimized Thin Film Coupled Inductor Band Pass Filters with Integrated Baluns
490
Area oriented pass-transistor logic synthesis using buffer elimination and layout compaction
491
Area Overhead Analysis of SEF: A Design Methodology for Tolerating SEU
492
Area Overhead and Test Time Co-Optimization through NoC Bandwidth Sharing
493
Area overhead reduction for small-delay defect detection using on-chip delay measurement
494
Area Partitioning for Channel Network Extraction Using Digital Elevation Models and Remote Sensing
495
Area Partitioning Method with Learning of Dirty Areas and Obstacles in Environments for Cooperative Sweeping Robots
496
Area penalty for sublinear signal propagation delay on chip
497
Area performance tradeoffs in NCL multipliers using two-dimensional pipelining
498
Area power and speed optimized serial type daisy chain memory using modified CPG with SSASPL
499
Area Power Consumption in a Single Cell Assisted by Relays
500
Area precision of the features abstracted from SPOT5 image
501
Area Preserving Brain Mapping
502
Area price spreads in the Nordic electricity market: The role of transmission lines and electricity import dependency
503
Area properties of television pictures
504
Area Radiation Monitor at the Intense Pulsed Neutron Source
505
Area Radiation Monitor System with Logarithmic Indication and Audio-Visual Warning
506
Area Recovery by Abutted Cell Placement: Can Fillers be Killers? An Eye-opening Viewpoint!
507
Area recovery under depth constraint by Cut Substitution for technology mapping for LUT-based FPGAs
508
Area reduction of millimeter-wave CMOS amplifier using narrow transmission line
509
Area reduction on interconnect optimized floorplan using deadspace utilization
510
Area reduction techniques for BIST PLA´s
511
Area resonances in excitation and ionization of quantum wells by ultrashort sub-cycle electric field pulses
512
Area resonances in excitation and ionization of quantum wells by ultrashort sub-cycle electric field pulses
513
Area Restricted Ad-hoc Network system based on Near Field Communication technology
514
Area retrieval of melting snow in alpine areas
515
Area routing for analog layout
516
Area routing oriented hierarchical corner stitching with partial bin
517
Area saved and clamp efficient multi-RC-triggered power clamp circuit for on-chip ESD protection
518
Area saving stimulator cells for multielectrode arrays featuring adaptive waveform generation and monitoring
519
Area scaling analysis of CMOS ADCs
520
Area Scaling for Backend Dielectric Breakdown
521
Area scaling in N2 waveguide lasers
522
Area Segmentation of Images Using Edge Points
523
Area selective gold MOCVD for VLSI electronics
524
Area selectivity of InGaAsP-InP multiquantum-well intermixing by impurity-free vacancy diffusion
525
Area Spare Power Automatic Switchover test system based on digital simulation
526
Area spatial object co-registration between imagery and GIS data for spatial-temporal change analysis
527
Area Spectral and Energy Efficiency Analysis of Cellular Networks with Cell DTX
528
Area spectral efficiency and area energy efficiency analysis in massive MIMO systems
529
Area Spectral Efficiency and Energy Efficiency Analysis in Downlink Massive MIMO Systems
530
Area spectral efficiency and energy efficiency of multi-hop multi-antenna cognitive underlay networks
531
Area spectral efficiency of a channel adaptive cellular mobile radio system in a correlated shadowed environment
532
Area spectral efficiency of cellular mobile radio systems
533
Area spectral efficiency of cellular mobile radio systems
534
Area spectral efficiency of cellular systems with Nakagami multipath fading
535
Area Spectral Efficiency of Co-Channel Deployed OFDMA Femtocell Networks
536
Area spectral efficiency of cooperative network with DF and AF relaying
537
Area Spectral Efficiency of Cooperative Network with Opportunistic Relaying
538
Area spectral efficiency of infrastructure-relay enhanced single-cell wireless systems
539
Area Spectral Efficiency of Shared Spectrum Hierarchical Cell Structure Networks
540
Area Spectral Efficiency of Soft-Decision Space–Time–Frequency Shift-Keying-Aided Slow-Frequency-Hopping Multiple Access
541
Area Spectral Efficiency of Soft-Decision Space-Time-Frequency Shift Keying Aided Slow Frequency Hopping Multiple Access
542
Area spectral efficiency of street microcell environment
543
Area spectral efficiency of underlay cognitive radio transmission over rayleigh fading channels
544
Area Spectral Efficiency of Wireless Multihop Networks in Rayleigh Fading Channel and The Impact of Terminal Density
545
Area spectral efficiency performance comparison between VLC and RF femtocell networks
546
Area spectral efficiency performance comparison of downlink fractional frequency reuse schemes for MIMO heterogeneous networks
547
Area spectrum efficiency of TV White Space wireless system with transmit power control
548
Area stenosis associated with non-invasive fractional flow reserve obtained from coronary CT images
549
Area Target Response of Triangularly Frequency-Modulated Continuous-Wave Radars
550
Area theorem and energy quantization for dissipative optical solitons
551
Area thresholding and silhouette extraction of simple coloured objects using hue
552
Area Throughput and Energy Consumption for Clustered Wireless Sensor Networks
553
Area throughput enhancement of OFDM-based wireless LAN in OBSS environment by physical header modification and adaptive array antenna
554
Area Throughput for CSMA based Wireless Sensor Networks
555
Area time power estimation for FPGA based designs at a behavioral level
556
Area time trade-offs in micro-grain VLSI array architectures
557
Area touch sensor for dextrous manipulation
558
Area traffic planning based on evaluation index systems and public sectors performance—Case study of China
559
Area Transforms
560
Area Transmission Efficiency of Single-User and Multi-User MIMO in Grid-Topology Wireless Mesh Networks
561
Area under ROC curve of energy detection over generalized fading channels
562
Area under the ROC Curve of Enhanced Energy Detector
563
Area Utilization Based Mapping for Network-on-chip Architectures with Over-sized IP Cores
564
Area versus detection latency trade-offs in self-checking memory design
565
Area virtual time
566
Area voltage control analysis in transmission systems based on clustering technique
567
Area wide hazardous goods monitoring on the TERN in Austria - project SHAFT
568
Area Wireless Sensor Networks for Personnel Location under Coalmine
569
Area wise high resolution water availability estimation using heterogeneous remote sensing and ensemble machine learning
570
Area word-length trade off in DSP algorithm implementation and optimization
571
Area–Delay–Power Efficient Carry-Select Adder
572
Area—Time Optimal VLSI Circuits for Convolution
573
Area×delay (A·T) efficient multiplier based on an intermediate hybrid signed-digit (HSD-1) representation
574
Area(number)-balanced hierarchy of staircase channels with minimum crossing nets
575
Area, delay, power, and cost trends for metal-programmable structured ASICs (MPSAs)
576
Area, Energy, and Time Assessment for a Distributed TPM for Distributed Trust in IoT Clusters
577
Area, performance, and sensitizable paths [logic design]
578
Area, performance, and yield implications of redundancy in on-chip caches
579
Area, power, and pin efficient bus transceiver using multi-bit-differential signaling
580
Area, reconfiguration delay and reliability trade-offs in designing reliable multi-mode FIR filters
581
Area, throughput and security considerations for AES crypto-ASICs
582
Area, throughput, and energy-efficiency trade-offs in the VLSI implementation of LDPC decoders
583
Area/bandwidth tradeoffs for CMOS current mirrors
584
Area/delay driven NoC synthesis
585
Area/Delay Efficient Recoding Methods for Parallel CORDIC Rotations
586
Area/delay estimation for digital signal processor cores
587
Area/performance evaluation of digit-digit GF(2K) multipliers on FPGAS
588
Area/power efficient implementation of a Log-MAP decoder for Turbo Codes through memory optimization
589
Area/yield trade-offs in scaled CMOS SRAM cell
590
AREA: A social curation platform for open educational resources and lesson plans
591
AREA: An augmented reality system for epidural anaesthesia
592
Area´s industries provide main topic at Middle Eastern meeting in West Virginia
593
Area-Aware Optimizations for Resource Constrained Branch Predictors Exploited in Embedded Processors
594
Area-aware topology generation for Application-Specific Networks-on-Chip using network partitioning
595
Area-Based Activity Information Preservation mechanism for ubiquitous sensor environment
596
Area-based collaborative distributed cache system using consumer electronics mobile device
597
Area-Based Collaborative Ubiquitous Work within Organizational Environments
598
Area-based communication detector
599
Area-based computation of stereo disparity with model-based window size selection
600
Area-based connected dominating set construction and maintenance algorithm in ubiquitous stub environment
601
Area-Based Dissemination in Vehicular Networks
602
Area-Based Hierarchical Binocular Stereo Matching Algorithm
603
Area-based interpolation for scaling of images from a CCD
604
Area-based maximum and security concern TRM evaluation by probabilistic approach
605
Area-based optimal controller for multi-machine power system
606
Area-based results for mine detection
607
Area-based total transfer capability evaluation
608
Area-based, loop-free internet routing
609
AreaCast: A cross-layer approach for a communication by area in Wireless Sensor Networks
610
Area-constrained coverage optimization by robotic sensor networks
611
Area-covering operation of a cleaning robot in a dynamic environment with unforeseen obstacles
612
Area-delay efficient architecture for MP algorithm using reconfigurable inner-product circuits
613
Area-Delay Efficient Binary Adders in QCA
614
Area-delay tradeoff in distributed arithmetic based implementation of FIR filters
615
Area-Delay-Energy Tradeoffs of Strain-Mediated Multiferroic Devices
616
Area-Delay-Power Efficient Fixed-Point LMS Adaptive Filter With Low Adaptation-Delay
617
Area-delay-power-efficient architecture for folded two-dimensional discrete wavelet transform by multiple lifting computation
618
Area-Dependence of High Frequency Spin-Transfer Resonance in GMR Contacts up to 300 nm Diameter
619
Area-Dependent Photodetection Frequency Response Characterization of Silicon Avalanche Photodetectors Fabricated With Standard CMOS Technology
620
Area-detection fibre-optic system for spatially offset Raman spectroscopy and Raman tomography in reflection mode
621
Area-distributed-soldering of flexible and rigid printed circuit boards
622
Area-Distribution Uniformizing Parameterization for Preserving Features of 3D Meshes
623
Area-driven decoupling capacitance allocation based on space sensitivity analysis for signal integrity
624
Area-Driven Decoupling Capacitance Allocation in Noise-Aware Floorplan for Signal Integrity
625
Area-driven optimisation of switched-capacitor DC/DC converters
626
Area-Driven White Space Distribution for Detailed Floorplan Design
627
Area-Effective and Power-Efficient Fixed-Width Booth Multipliers Using Generalized Probabilistic Estimation Bias
628
Area-effective FIR filter design for multiplier-less implementation
629
Area-effective programmable FSM-based MBIST for synchronous SRAM
630
Area-efficent power clamp circuit using gate-coupled structure for Smart Power ICs
631
Area-efficient 100G+ EFEC calculation with Xilinx FPGAs
632
Area-Efficient 128- to 2048/1536-Point Pipeline FFT Processor for LTE and Mobile WiMAX Systems
633
Area-efficient 2-D digital filter architectures possessing diagonal and four-fold rotational symmetries
634
Area-efficient 2-D shift-variant convolvers for FPGA-based digital image processing
635
Area-efficient 2-D shift-variant convolvers for FPGA-based digital image processing
636
Area-efficient 2D shift-variant convolvers for FPGA-based digital image processing
637
Area-efficient 3-input decimal adders using simplified carry and sum vectors
638
Area-efficient advanced multiuser WCDMA receiver
639
Area-efficient and fast sign detection for four-moduli set RNS {2n −1,2n, 2n +1,22n +1}
640
Area-efficient and low-power implementation of vision chips using multi-level mixed-mode processing
641
Area-efficient and power-efficient binary to BCD converters
642
Area-efficient and reusable VLSI architecture of decision feedback equalizer for QAM modem
643
Area-efficient and scalable solution to real-data fast fourier transform via regularised fast Hartley transform
644
Area-efficient and self-biased capacitor multiplier for on-chip loop filter
645
Area-efficient and ultra-low-power architecture of RSA processor for RFID
646
Area-efficient architecture for Fast Fourier transform
647
Area-Efficient Architectures for Large Integer and Quadruple Precision Floating Point Multipliers
648
Area-efficient architectures for the Viterbi algorithm
649
Area-efficient architectures for the Viterbi algorithm II. Applications
650
Area-efficient architectures for the Viterbi algorithm. I. Theory
651
Area-efficient area pad design for high pin-count chips
652
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
653
Area-Efficient Asynchronous Multilevel Single-Track Pipeline Template
654
Area-efficient buffer binding based on a novel two-part FIFO structure
655
Area-efficient capacitor-less LDR with enhanced transient response for SoC in 65-nm CMOS
656
Area-efficient check node unit architecture for single block-row quasi-cyclic LDPC codes
657
Area-efficient CMOS charge pumps for LCD drivers
658
Area-efficient CMOS distributed amplifier using compact CMOS interconnects
659
Area-efficient CMOS output buffer with enhanced high ESD reliability for deep submicron CMOS ASIC
660
Area-Efficient Configurable High-Throughput Signal Detector Supporting Multiple MIMO Modes
661
Area-efficient correlated double sampling scheme with single sampling capacitor for CMOS image sensors
662
Area-efficient digital baseband module for Bluetooth wireless communications
663
Area-efficient diminished-1 multiplier for fermat number-theoretic transform
664
Area-efficient drawings of rectangular duals for VLSI floor-plan
665
Area-efficient dynamic thermal management unit using MDLL with shared DLL scheme for many-core processors
666
Area-efficient dynamically reconfigurable protocol-processing-hardware for access network communications SoC
667
Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme
668
Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) cell and read-disturb-free temperature-aware current-mode read scheme
669
Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) Cell and read-disturb-free temperature-aware current-mode read scheme
670
Area-Efficient Error Protection for Caches
671
Area-Efficient ESD Clamp Circuit With a Capacitance-Boosting Technique to Minimize Standby Leakage Current
672
Area-Efficient ESD Protection Design without Additional Process Cost in 0.18 um Salicided CMOS Technology
673
Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs
674
Area-efficient event stream ordering for runtime observability of embedded systems
675
Area-efficient fast scheduling schemes for MVC prediction architecture
676
Area-Efficient Fast-Speed Lateral IGBT With a 3-D n-Region-Controlled Anode
677
Area-efficient FFT processors for OFDM systems
678
Area-Efficient FIR Filter Design on FPGAs using Distributed Arithmetic
679
Area-Efficient Fixed-Width Squarer With Dynamic Error-Compensation Circuit
680
Area-Efficient FPGA Implementation of Quadruple Precision Floating Point Multiplier
681
Area-Efficient FPGA Implementations of the SHA-3 Finalists
682
Area-efficient FPGA logic elements: Architecture and synthesis
683
Area-efficient FPGA-based FFT processor
684
Area-Efficient Fully R-DAC Based TFT-LCD Column Driver Architectures With DAC Sharing Techniques
685
Area-efficient gain- and offset-compensated very-large-time-constant SC biquads
686
Area-efficient gain- and offset-compensated very-large-time-constant SC integrator
687
Area-efficient graph layouts
688
Area-Efficient H.264 VLC Decoder Using Sub-tree Classification
689
Area-efficient high speed decoding schemes for turbo/MAP decoders
690
Area-efficient high-speed 3D DW processor architecture
691
Area-efficient high-speed carry chain
692
Area-efficient high-speed decoding schemes for turbo decoders
693
Area-efficient high-throughput MAP decoder architectures
694
Area-efficient high-throughput sorted QR decomposition-based MIMO detector on FPGA
695
Area-efficient high-throughput VLSI architecture for MAP-based turbo equalizer
696
Area-efficient high-voltage switch using floating control circuit for 3D ultrasound imaging systems
697
Area-efficient implementation of a fast square root algorithm
698
Area-Efficient Implementation of a Pulse-Mode Neuron Model
699
Area-efficient implementation of low bit-depth motion estimation algorithms
700
Area-efficient implication circuits for very dense Lukasiewicz logic arrays
701
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
702
Area-efficient integrated antennas for inter-chip communication
703
Area-efficient layout design for CMOS output transistors
704
Area-efficient layout design for output transistors with consideration of ESD reliability
705
Area-efficient layout design of comparator using cascaded technique
706
Area-efficient linear regulator with ultra-fast load regulation
707
Area-efficient line-based two-dimensional discrete wavelet transform architecture without data buffer
708
Area-efficient low PDP 8-bit vedic multiplier design using compressors
709
Area-efficient low-cost low-dropout regulators using MOS capacitors
710
Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference
711
Area-efficient low-power 8-bit 20-MS/s SAR ADC in 0.18μm CMOS
712
Area-efficient LUT circuit design based on asymmetry of MTJ´s current switching for a nonvolatile FPGA
713
Area-efficient LUT-like programmable logic using atom switch and its mapping algorithm
714
Area-efficient memory-based architecture for FFT processing
715
Area-efficient method to approximate two minima for LDPC decoders
716
Area-Efficient Min-Sum Decoder Design for High-Rate Quasi-Cyclic Low-Density Parity-Check Codes in Magnetic Recording
717
Area-efficient multichannel oversampled PCM voice-band coder
718
Area-Efficient Multimode Encoding Architecture for Long BCH Codes
719
Area-Efficient Multi-moduli Squarers for RNS
720
Area-Efficient Multipliers Based on Multiple-Radix Representations
721
Area-efficient multipliers for digital signal processing applications
722
Area-efficient multiport memories for the Tb/s bandwidth era
723
Area-Efficient NEDA Architecture for The 1-D DCT/IDCT
724
Area-efficient offset compensation and common-mode control circuit with switched-capacitor technique in an 18 Gbps optical receiver in 80 nm CMOS
725
Area-Efficient On-Chip DC–DC Converter With Multiple-Output for Bio-Medical Applications
726
Area-efficient parallel decoder architecture for high rate QC-LDPC codes
727
Area-efficient parallel FIR digital filter implementations
728
Area-Efficient Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR Algorithm
729
Area-efficient parallel white Gaussian noise generator
730
Area-efficient parallel-prefix Ling adders
731
Area-efficient pipelining for FPGA-targeted high-level synthesis
732
Area-efficient power-rail ESD clamp circuit with SCR device embedded into ESD-transient detection circuit in a 65nm CMOS process
733
Area-Efficient Prefilter Architecture for a CDMA Receiver
734
Area-Efficient Processor for Public-Key Cryptography in Wireless Sensor Networks
735
Area-efficient programmable switched-capacitor-based peak detector
736
Area-efficient pulse-shaping 1:4 interpolated FIR filter based on LUT partitioning
737
Area-efficient R-C DACs with low-offset push-pull output buffers for a 10-bit LCD source driver
738
Area-efficient RC low pass filter using T-networked resistors and capacitance multiplier
739
Area-efficient reconfigurable-array-based oscillator for standard cell characterisation
740
Area-efficient recursive degree computationless modified Euclid´s architecture for Reed-Solomon Decoder
741
Area-efficient Reed-Solomon decoder design for 10-100 Gb/s applications
742
Area-efficient reed-solomon decoder design for optical communications
743
Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding
744
Area-efficient selective multi-threshold CMOS design methodology for standby leakage power reduction
745
Area-efficient self-calibration technique for pipe-lined algorithmic A/D converters
746
Area-Efficient Signed Fixed-Width Multipliers with Low-Error Compensation Circuit
747
Area-efficient single-stage configuration for implantable neural recording amplifiers based on back attenuation
748
Area-efficient special function unit for mobile vertex processors
749
Area-Efficient Subquadratic Space-Complexity Digit-Serial Multiplier for Type-II Optimal Normal Basis of GF(2^{m}) Using Symmetric TMVP and Block Recombination Techniques
750
Area-efficient syndrome calculation for strong BCH decoding
751
Area-efficient synthesis of fault-secure NoC switches
752
Area-efficient systolic architectures for inversions over GF(2m)
753
Area-Efficient Temporally Hardened by Design Flip-Flop Circuits
754
Area-efficient TFM-based stochastic decoder design for non-binary LDPC codes
755
Area-Efficient Three Axis MEMS Lorentz Force Magnetometer
756
Area-efficient three-axis micromechanical magnetic sensor
757
Area-efficient truncated Berlekamp-Massey architecture for Reed-Solomon decoder
758
Area-efficient VDD-to-vSS ESD Clamp Circuit By Using Substrate-triggering Field-oxide Device (STFFOD) For Whole-chip ESD Protection
759
Area-efficient video transform for HEVC applications
760
Area-efficient VLSI architecture for the traceback Viterbi decoder supporting punctured codes
761
Area-efficient VLSI architecture of joint carrier recovery and blind equalization for QAM demodulator
762
Area-Efficient VLSI Design of Reed–Solomon Decoder for 10GBase-LX4 Optical Communication Systems
763
Area-efficient VLSI design of Reed-Solomon decoder for 10GBase-LX4 optical communication systems
764
Area-Efficient VLSI Implementation for Parallel Linear-Phase FIR Digital Filters of Odd Length Based on Fast FIR Algorithm
765
Area-efficient VLSI implementation of digital filters via multiple product intercoding
766
Area-efficient VLSI implementation of FIR digital filters using shifted partial products
767
Area-efficient VLSI layouts for binary hypercubes
768
Area-efficient voltage-feedback type CMOS companding integrator
769
Area-efficient, reduced and no-snapback PNP-based ESD protection in advanced Smart Power technology
770
Area-EfficientFault Detection During Self-Recovering Microarchitecture Synthesis
771
Area-granulometry: an improved estimator of size distribution of image objects
772
Area-high speed design trade-offs for advanced encryption standard cipher engine
773
Area-I/O flip-chip routing for chip-package co-design
774
Area-I/O Flip-Chip Routing for Chip-Package Co-Design Considering Signal Skews
775
Area-I/O RDL routing for chip-package codesign considering regional assignment
776
Area-IO DRAM/logic integration with system-in-a-package (SiP)
777
Areal capacity limit on the growth of small cell density in heterogeneous networks
778
Areal changes and motion of northern Larsen Ice Shelf, Antarctic Peninsula
779
Areal Density Estimates at Increased Flying Height for Perpendicular Recording on Removable Media
780
Areal density limits for perpendicular magnetic recording
781
Areal density limits for perpendicular magnetic recording
782
Areal Density Potential for Non-Stoner-Wohlfarth Media
783
Areal density prediction for Microwave Assisted Magnetic Recording (MAMR)
784
Areal Density Prediction for Microwave-Assisted Magnetic Recording
785
Areal density process advantages for CPP sensors
786
Areal inhomogeneities in MIS solar cells
787
Areal rainfall estimates using differential phase
788
Areal spectrum utilization efficiency in digital radio link networks
789
AREAL: automated reasoning expert for analogue layout
790
Area-Layered Paths Optimizing Algorithms of Platoon Vehicles
791
Areal-Density Capability of a Magnetic Recording System Using a “747” Test Based Only on Data-Block Failure-Rate
792
Area-level reduction of wheeling loop flows in regional power networks
793
Area-Load Based Pricing in DSM Through ANN and Heuristic Scheduling
794
Areamap and Gabor filter based Vickers hardness indentation measurement
795
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction
796
Area-of-difference methods for detection of ventricular tachycardia using morphology
797
Area-optimal technology mapping for field-programmable gate arrays based on lookup tables
798
Area-optimal three-layer channel routing
799
Area-Optimal Transistor Folding for 1-D Gridded Cell Design
800
Area-optimised registers using a folded PLA
801
Area-Optimized Architectures & Implementation of PELICAN MAC Function
802
Area-optimized FPGA implementation of a digital FM modulator
803
Area-optimized implementation of quadrature direct digital frequency synthesizers on LUT-based FPGAs
804
Area-oriented iterative method for Design Space Exploration with High-Level Synthesis
805
Area-Oriented Reference Station Placement for Network RTK
806
Area-oriented synthesis for pass-transistor logic
807
Area-Performance Trade-offs in Tiled Dataflow Architectures
808
Area-periphery partitioning of currents in self-aligned silicon bipolar transistors
809
Area-Per-Yield and Defect Level of Cascaded TMR for Pipelined Processors
810
Area-Power Efficient Lifting-Based DWT Hardware for Implantable Neuroprosthetics
811
Area-power efficient lighting unit architecture based on hardware sharing
812
Area-Power Efficient Modulo 2^{n}-1 and Modulo 2^{n}+1 Multipliers for
828
Areas of Vulnerability in an Environment of Uncertainty
829
Areas vs. layers: biological aspects of neural network design
830
Area-saving technique for low-error redundant binary fixed-width multiplier implementation
831
Area-Scaling of Tunnel Junctions: Comparison Between Shadow Evaporation and Lithographic Processing
832
Area-sharing cyclic structure MRF cirucits design in ultra-low supply voltage
833
Area-speed efficient modular architecture for GF(2m) multipliers dedicated for cryptographic applications
834
Area-Speed Tradeoffs for Hierarchical Field-Programmable Gate Arrays
835
Area-throughput trade-offs for fully pipelined 30 to 70 Gbits/s AES processors
836
Area-time analysis of carry lookahead adders using enhanced multiple output domino logic
837
AREA-Time Efficient Addition in Charge Based Technology
838
Area-time efficient arithmetic elements for VLSI systems
839
Area-time efficient between-class variance module for adaptive segmentation process
840
Area-time efficient diminished-1 multiplier for Fermat number transform
841
Area-time efficient hardware architecture for factoring integers with the elliptic curve method
842
Area-Time Efficient Implementation of the Elliptic Curve Method of Factoring in Reconfigurable Hardware for Application in the Number Field Sieve
843
Area-time efficient modulo 2n-1 adder design
844
Area-time efficient realization of multiple constant multiplication
845
Area-Time Efficient Scaling-Free CORDIC Using Generalized Micro-Rotation Selection
846
Area-Time Efficient Self-Checking ALU Based on Scalable Error Detection Coding
847
Area-time efficient serial-serial multipliers
848
Area-time efficient sign detection technique for binary signed-digit number system
849
Area-time estimation of C-based functions for design space exploration
850
Area-Time Estimation of Controller for Porting C-Based Functions onto FPGA
851
Area-time high level synthesis laws: theory and practice
852
Area-time model for synthesis of non-pipelined designs
853
Area-time optimal adder design
854
Area-time optimal adder with relative placement generator
855
Area-time optimal digital BiCMOS carry look-ahead adder
856
Area-Time Optimal Fast Implementation of Several Functions in a VLSI Model
857
Area-time performance of VLSI FIR filter architectures based on residue arithmetic
858
Area-time tradeoffs in FIR digital filters with broadcast and pipelined designs
859
Area-time tradeoffs in h.264/AVC deblocking filter design for mobile devices
860
Area-time-efficient VLSI residue-to-binary converters
861
Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2n,2n+1−1,2n−1)
862
Area-time-power tradeoff in cellular arrays VLSI implementations
863
Area-time-power tradeoffs in parallel adders
864
Area-universal circuits with constant slowdown
865
Area-weighted surface normals for 3D object recognition
866
Area-wide ANPR coverage with a small number of instrumented vehicles
867
Area-Wide System Protection Scheme Against Extreme Contingencies
868
Arecanut grading based on three sigma controls and SVM
869
AreCAPTCHA: Outsourcing Arabic Text Digitization to Native Speakers
870
Arecibo focal phased array feasibility study and instrument concept design
871
Arecibo Observatory 40th anniversary celebration
872
Arecibo Observatory 40th anniversary celebration
873
Arecibo observatory report
874
Arecibo radio antenna
875
ARecycle NOID ARt Game: The Augmented Reality Game in Public Space
876
ARED: a novel adaptive congestion controller
877
ARED-CK: an Automated Requirements Elicitation Approach Based on Decision-making with Complete Knowledge
878
AREEB: Automatic REfrain extraction for ThumBnail
879
AREEF Multi-player Underwater Augmented Reality experience
880
ARemote: A Tangible Interface for Selecting TV Channels
881
AREN: A Popularity Aware Replication Scheme for Cloud Storage
882
ARENA and WOXBOT: first steps towards virtual world simulations
883
Arena in the petrochemical operations environment
884
Arena simulation model for multi echelon inventory system in supply chain management
885
Arena software tutorial
886
Arena Software Tutorial
887
ARENA, a rule evaluating neural assistant that performs rule-based logic optimization
888
ARENA: a versatile and multidisciplinary scientific submarine cable network of next generation
889
ARENA: Structured Visual Mapping of the Technological Ecology
890
AR-enabled wayfinding kiosk
891
AREP: Adaptive Resource Efficient Prefetching for Maximizing Multicore Performance
892
AREPS and TEMPER - Getting Familiar with these Powerful Propagation Software Tools
893
ARe-quantization noise reduction method in MPEG-2 to H.264 intra transcoding
894
ARES 2010 Conference Officers
895
ARES 2010 Reviewer List
896
ARES 2012 - 2012 Seventh International Conference on Availability, Reliability and Security [Cover art]
897
ARES 2013 Workshops: Message from the Workshop Chair
898
ARES 2014 Organizing Committee
899
ARES 2015 Program Committee and Local Organizing Committee
900
ARES and Workshops Committees
901
ARES and Workshops Committees
902
ARES Committee Lists
903
ARES Conference: Welcome Message from the ARES Conference Officers
904
Ares I design for operability
905
Ares I static tests design
906
Ares Launch Vehicles Lean Practices Case Study
907
Ares V: Enabling unprecedented payloads for Space in the 21st century
908
ARES Workshops: Welcome Message from the ARES Workshop Co-Chairs
909
ARES: A relational database with the capability of performing flexible interpretation of queries
910
ARES: A Semantic Solution for Business Collaboration
911
ARES: An environment for speech analysis and labelling
912
ARES: radar data generator for systems design and development
913
ARES-architecture reinforcing superscalar
914
ARES-III: A versatile multi-purpose all-terrain robot
915
ARES-IND 2013: Message from the Workshop Organizers
916
ARES-IND 2014 Workshop Program Committee
917
ARET for system-level IC reliability simulation
918
Aretecture For Global Motion Parameter Computer In Video Coding
919
ARE-type iterations for rational Riccati equations arising in stochastic control
920
AREUS — Innovative hardware and software for sustainable industrial robotics
921
AReViRoad : a traffic road simulator to learn how to behave
922
AREX: An Adaptive System for Secure Resource Access in Mobile P2P Systems
923
ArF Excimer Laser Lithography
924
ArF laser induced photochemical surface modification of polypropylene for adhesion by using tap wate
925
ArF laser-induced discharge interruption in a mixture of C2 H3Cl/CF4/CH4, CF4/CH 4, and C2H3Cl/He
926
ArF Laser-induced Photochemical Surface Modification Of Fluororesin
927
ArF lithography for the 130 and 100 nm technology nodes
928
ArF lithography technologies for 65 nm-node CMOS (CMOS5) with 30 nm logic gate and high density embedded memories
929
ArF photoresist etching behavior evaluation
930
ArF resist CD shrinkage induced by defect inspection
931
ARF60 AUS-UAV modeling, system identification, guidance and control: Validation through hardware in the loop simulation
932
ARFA: Automated real-time flight data analysis using evolving clustering, classifiers and recursive density estimation
933
ARFBF model for non stationary random fields and application in HRTEM images
934
Arff convertor tool for WEKA data mining software
935
ARFI beam sequence performance as evaluated by trained readers: Plaque detection
936
ARFI imaging of the cardiovascular system
937
ARFI imaging of thermal lesions in ex vivo and in vivo soft tissues
938
ARFI ultrasound for in vivo monitoring of soft-tissue bleeding and hemostasis in a dog model of hemophilia
939
ARFrequency Domain Analysis of the IEEE 802.15.4a Standard Channel Models
940
ARFT Mailing and Membership List as of 02/12/93
941
ARFTG
942
ARFTG
943
ARFTG
944
ARFTG
945
ARFTG 2009
946
ARFTG 2011
947
ARFTG 50 year network analyzer history
948
ARFTG 63rd Microwave Measurement Conference
949
ARFTG 63rd Microwave measurement conference
950
ARFTG 70th Microwave Measurement Symposium
951
ARFTG 70th Microwave Measurement Symposium - High Power RF Measurement Techniques
952
ARFTG 72nd Microwave Measurement Symposium first call for papers
953
ARFTG 75th Microwave Measurement Conference
954
ARFTG 75th Microwave Measurement Conference
955
ARFTG 75th Microwave Measurement Conference
956
ARFTG 75th Microwave Measurement Conference - call for papers
957
ARFTG 76th Microwave Measurement Symposium
958
ARFTG 77th Microwave Measurement Conference
959
ARFTG 77th Microwave Measurement Conference
960
ARFTG 78th Microwave and Measurement Symposium and IEEE Topical Symposium on Power Amplifiers
961
ARFTG 78th Microwave Measurement Symposium
962
ARFTG 78th Microwave Measurement Symposium
963
ARFTG 80th Microwave Measurement Conference Advances in Wireless Communication Test & Measurements
964
ARFTG 83rd Microwave Measurement Conference
965
ARFTG 83rd Microwave Measurement Conference Microwave Measurements for Emerging Technologies
966
ARFTG Conference Archive - Index by Author
967
ARFTG Constitution
968
ARFTG Constitution and Articles of Organization
969
ARFTG Executive Committee Members
970
ARFTG Executive Committee Members
971
ARFTG Executive Committee Members
972
ARFTG Executive Committee Members
973
ARFTG Executive Committee Members
974
ARFTG Executive Committee Members
975
ARFTG Executive Committee Members
976
ARFTG Executive Committee Members
977
ARFTG Executive Committee Members
978
ARFTG Executive Committee Members
979
ARFTG Executive Committee Members
980
ARFTG Executive Committee Members
981
ARFTG Executive Committee Members
982
ARFTG Explores Emerging Measurement Technologies
983
ARFTG June 2009
984
ARFTG June 2011
985
ARFTG June 2012
986
ARFTG June 2013
987
ARFTG June 2014
988
ARFTG Mailing and Membership List as of 03/11/94
989
ARFTG Mailing and Membership List as of 04/12/95
990
ARFTG Mailing and Membership List as of 04/12/95
991
ARFTG Mailing and Membership List as of 04/12/95
992
ARFTG Mailing and Membership List as of 08/13/93
993
ARFTG Mailing and Membership List as of 11/12/96
994
ARFTG Mailing and Membership List as of 11/12/96
995
ARFTG Mailing and Membership List as of 11/18/94
996
ARFTG Mailing List
997
ARFTG Mailing List June 1987
998
ARFTG Mailing List May 1988
999
ARFTG May 2010
1000
ARFTG May 2015